STP3NA100
STP3NA100FI
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
■ TYPICALR
DS(on)
=4.3 Ω
■ ± 30V GATE TO SOURCE VOLTAGERATING
■ 100% AVALANCHETESTED
■ REPETITIVEAVALANCHE DATA AT 100
o
C
■ LOWINTRINSICCAPACITANCES
■ GATECHARGEMINIMIZED
■ REDUCEDTHRESHOLD VOLTAGESPREAD
APPLICATIONS
■ HIGH CURRENT, HIGHSPEEDSWITCHING
■ SWITCHMODEPOWER SUPPLIES(SMPS)
■ DC-ACCONVERTERS FOR WELDING
EQUIPMENTAND UNINTERRUPTIBLE
POWERSUPPLIES AND MOTORDRIVE
INTERNAL SCHEMATIC DIAGRAM
February 1998
TO-220 TO-220FI
1
2
3
1
2
3
ABSOLUTE MAXIMUM RATINGS
Symb o l Para meter Value Uni t
ST P3NA100 STP3N A100FI
V
DS
Drain-source Voltage (VGS= 0) 1000 V
V
DGR
Drain- gate Voltage (RGS=20kΩ)
1000 V
V
GS
Gat e- source Voltage ± 30 V
I
D
Drain Current (continuous ) at Tc=25oC3.52.0A
I
D
Drain Current (continuous ) at Tc=100oC2.01.2A
I
DM
(•) Drain Current (pulsed ) 14 14 A
P
tot
Tot al Dissip at i on at Tc=25oC11045W
Derat in g F actor 0.88 0.36 W/
o
C
V
ISO
Ins ulation Withs t a nd Volt age (DC) 2000 V
T
stg
Sto rage Temperature -65 to 150
o
C
T
j
Max. Oper at in g Junc t io n Temper at ure 150
o
C
(•) Pulsewidth limitedby safe operating area
TYPE V
DSS
R
DS(on)
I
D
STP3NA100
ST P3NA100F I
1000 V
1000 V
<5 Ω
<5Ω
3.5 A
2A
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