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STP12NK30Z
N-CHANNEL 300V - 0.36Ω -9A-TO-220
Zener-Protected SuperMESH™Power MOSFET
TYPE V
DSS
R
DS(on)ID
(1)
Pw (1)
STP12NK30Z 300 V < 0.4 Ω 9A 90W
■ TYPICAL R
■ EXTREMELY HIGH dv/dt CAPABILITY
■ IMPROVED ESD CAPABILITY
■ 100% AVALANCHE RATED
■ GATE CHARGE MINIMIZED
■ VERY LOW INTRINSIC CAPACITANCES
■ VERY GOOD MANUFACTURING
(on) = 0.36 Ω
DS
REPEATIBILITY
DESCRIPTION
The SuperME SH™ series is obtained through an
extreme optimi za tio n of ST’s well established stripbased PowerMESH™ layout. In addition to pus hing
on-resistance significantly down, special c are is taken to ensure a v e ry good dv/dt capability for the
most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary M Dmesh™ products.
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ LIGHTING
■ IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
■ HIGH CURRENT, HIGH SPEED SWITCHING
ORDERING INFORMATION
SALES TYPE MARKING PACKAGE PACKAGING
STP12NK30Z P12NK30Z TO-220 TUBE
1/8December 2002
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STP12NK30Z
ABSOLUTE MAX IMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
D
I
DM
P
TOT
V
ESD(G-S)
dv/dt (2) Peak Diode Recovery voltage slope 4.5 V/ns
T
stg
T
THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max 1.38 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
T
Note: 1. Pulse width limited by safe operating area
2. I
Drain-source Voltage (VGS=0)
Drain-gate Voltage (RGS=20kΩ)
300 V
300 V
Gate- source Voltage ± 30 V
Drain Current (continuous) at TC= 25°C
Drain Current (continuous) at T
(1)
Drain Current (pulsed) 36 A
= 100°C
C
9
5.6
Total Dissipation at TC= 25°C 90
Derating Factor 0.72 W/°C
Gate source ESD(HBM-C=100pF, R=1.5KΩ) 3000 V/ns
Storage Temperature
Max. Operating Junction Temperature
j
Maximum Lead Temperature For Soldering Purpose 300 °C
l
< 9A, di/dt<300A/µs, VDD<V
SD
(BR)DSS,TJ<TJMAX
–55 to 150 °C
A
A
W
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
E
AS
Single Pulse Avalanche Energy
(starting T
max)
j
= 25 °C, ID=IAR,VDD=50V)
j
9A
155 mJ
GATE-SOURCE ZENER DIOD E
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown
Igs=± 1mA (Open Drain) 30 V
Voltage
PROTECTION FEA TURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients tha t may occasionally be
applied from gate t o source. In this respect the Zene r voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of ex ternal c omponents.
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STP12NK30Z
ELECTRICAL CHARACTE RISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Zero Gate Voltage
Drain Current (V
GS
=0)
Gate-body Leakage
Current (V
DS
=0)
Gate Threshold Voltage
Static Drain-source On
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS=10V,ID= 4.5 A 5.4 S
g
fs
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
(3) Equivalent Output
C
oss eq.
C
iss
C
oss
C
rss
Capacitance
R
G
Gate Input Resistance f=1 MHz Gate DC Bias = 0
SWITCHING
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
Q
Q
Q
t
r
t
f
g
gs
gd
Turn-on Delay Time
Rise time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
ID=1mA,VGS= 0 300 V
V
= Max Rating
DS
VDS= Max Rating, TC= 125 °C
V
= ± 20V ±10 µA
GS
V
DS=VGS,ID
= 50µA
3 3.75 4.5 V
1
50
VGS=10V,ID= 4.5 A 0.36 0.4 Ω
=25V,f=1MHz,VGS= 0 670
V
DS
125
28
VGS=0V,VDS= 0V to 440 V 70 pF
3.6 Ω
Test Signal Level = 20mV
Open Drain
=150V,ID= 4.5 A
V
DD
R
= 4.7Ω VGS=10V
G
(Resistive Load see, Figure 3)
16
20
36
10
=240V,ID=9A,
V
V
DD
GS
=10V
25
5.5
35
13.4
µA
µA
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
SOURCE DR AIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
Source-drain Current
(2)
Source-drain Current (pulsed)
(1)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
is defined as a constant equivalent capacitance giving the same charging time as C
oss eq.
.
V
DSS
ISD= 9 A, VGS=0
I
SD
V
DD
(see test circuit, Figure 5)
= 9 A, di/dt = 100A/µs
=40V,Tj= 150°C
165
0.9
11.2
when VDSincreases from 0 to 80%
oss
9
36
1.6 V
A
A
ns
µC
A
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