STD2NB50
3
STD2NB50-1
N-CHANNEL 500V - 5Ω - 1A DPAK / IPAK
PowerMesh™ MOSFET
TYPE V
STD2NB50
STD2NB50-1
■ TYPICAL R
■ 100% AVALANCHE TESTED
■ VERY LOW INTRINSIC CAPAC ITANCES
■ ADD SUFFIX “T4” FOR ORDERING IN TAPE &
DS
DSS
500V
500V
(on) = 5 Ω
R
DS(on)
< 6Ω
< 6Ω
I
D
1 A
1 A
REEL
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding
performances. The new patent pending strip layout
coupled with the Company’s proprieraty edge termination structure, gives the lowest RDS(on) per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteristics.
APPLICATIONS
■ SWITH MODE POWER SUPPLI ES ( SMPS)
■ LIGHTING FOR INDUSTRIAL AND CONSUMER
ENVIRONMENT
3
1
DPAK IPAK
INTERNAL SCHEMATIC DIAGRAM
2
1
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
dv/dt(1) Peak Diode Recovery voltage slope 3.5 V/ns
T
stg
T
j
(•)Pu l se width limited by safe operating area
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
Gate- source Voltage ± 30 V
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
(●)
Drain Current (pulsed) 4 A
Total Dissipation at TC = 25°C
Derating Factor 0.32 W/°C
Storage Temperature –65 to 150 °C
Max. Operating Junction Temperature 150 °C
(1)ISD ≤1A, di/dt ≤200A/µs, VDD ≤ V
500 V
500 V
1A
0.63 A
40 W
, Tj ≤ T
(BR)DSS
JMAX.
1/10September 2001
STD2NB50/STD2NB50-1
THERMA L D ATA
Rthj-case Thermal Resistance Junction-case Max 3.125 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W
T
l
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
Maximum Lead Temperature For Soldering Purpose 275 °C
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
Drain-source
= 25 °C, ID = IAR, VDD = 50 V)
j
ID = 250 µA, VGS = 0 500 V
1A
40 mJ
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
V
= Max Rating
DS
V
= Max Rating, TC = 125 °C
DS
V
= ±30V ±100 nA
GS
1µA
50 µA
ON
(1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
V
= VGS, ID = 250µA
DS
VGS = 10V, ID = 0.5 A
2.3 3 3.7 V
56Ω
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS > I
g
fs
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 35 pF
Reverse Transfer
Capacitance
I
D
V
DS
= 0.5 A
D(on)
x R
DS(on)max,
= 25V, f = 1 MHz, VGS = 0
0.75 S
185 pF
4pF
2/10
STD2NB50/STD2NB50-1
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
t
d(on)
t
r
Q
g
Q
gs
Q
gd
Turn-on Delay Time
Rise Time 24 ns
Total Gate Charge
Gate-Source Charge 2.5 nC
Gate-Drain Charge 3.5 nC
SWITCHING OFF
Symbol Param eter Test Conditions Min. Typ. Max. U nit
t
r(Voff)
t
t
f
c
Off-voltage Rise Time
Fall Time 24 ns
Cross-over Time 30 ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD (1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pul se duration = 300 µs, duty cy cle 1.5 %.
2. Pulse width l i m i t ed by safe ope rating area.
(2)
Source-drain Current 1 A
Source-drain Current (pulsed) 4 A
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charg e 780 µC
Reverse Recovery Curren t 4.7 A
= 200V, ID = 0.5A
DD
RG= 4.7Ω VGS = 10V
(see test circuit, Figure 3)
V
= 4000V, ID = 1A,
DD
VGS = 10V
V
= 400V, ID = 1 A,
DD
RG= 4.7Ω, V
GS
= 10V
(see test circuit, Figure 5)
ISD = 1A, VGS = 0
I
= 1A, di/dt = 100A/µs,
SD
VDD = 100V, Tj = 150°C
(see test circuit, Figure 5)
20 ns
710nC
20 ns
1.5 V
330 ns
Thermal Impedence Safe Operating Area
3/10
STD2NB50/STD2NB50-1
Output Characteristics
Transconductance Static Drain-source On Resistance
Transfer Characteristics
Gate Charge vs Gate-source Voltage
4/10
Capacitance Variations
STD2NB50/STD2NB50-1
Normalized Gate Threshold Volta ge vs
Temperature
Source-drain Diode Forward Characteristics
Normalized On Resistance vs Temperature
5/10
STD2NB50/STD2NB50-1
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/10
TO-251 (IPAK) MECHANICAL DAT A
STD2NB50/STD2NB50-1
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
mm inch
A 2.2 2.4 0.086 0.094
A1 0.9 1.1 0.035 0.043
A3 0.7 1.3 0.027 0.051
B 0.64 0.9 0.025 0.031
B2 5.2 5.4 0.204 0.212
B3 0.85 0.033
B5 0.3 0.012
B6 0.95 0.037
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181
H 15.9 16.3 0.626 0.641
L 9 9.4 0.354 0.370
L1 0.8 1.2 0.031 0.047
L2 0.8 1 0.031 0.039
H
A
C2
L2
E
B2
= =
= =
D
B3
2
1 3
L1
A1
L
B6
C
A3
B
B5
G
= =
0068771-E
7/10
STD2NB50/STD2NB50-1
TO-252 (DPAK) MECHANICAL DATA
DIM.
A 2.20 2.40 0.087 0.094
A1 0.90 1.10 0.035 0.043
A2 0.03 0.23 0.001 0.009
B 0.64 0.90 0.025 0.035
B2 5.20 5.40 0.204 0.213
C 0.45 0.60 0.018 0.024
C2 0.48 0.60 0.019 0.024
D 6.00 6.20 0.236 0.244
E 6.40 6.60 0.252 0.260
G 4.40 4.60 0.173 0.181
H 9.35 10.10 0.368 0.398
L2 0.8 0.031
L4 0.60 1.00 0.024 0.039
V2 0
MIN. TYP. MAX. MIN. TYP. MAX.
o
mm inch
o
8
o
0
o
0
8/10
P032P_B
STD2NB50/STD2NB50-1
DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT (suffix ”T4”)*
TUBE SHIPMENT (no suffix)*
All dimensions
are in millimeters
REEL MECHANICAL DATA
DIM.
A 330 12.992
B 1.5 0.059
C 12.8 13.2 0.504 0.520
D 20.2 0.795
G 16.4 18.4 0.645 0.724
N 50 1.968
T 22.4 0.881
mm inch
MIN. MAX. MIN. MAX.
TAPE MECHANICAL DATA
DIM.
A0 6.8 7 0.267 0.275
B0 10.4 10.6 0.409 0.417
B1 12.1 0.476
D 1.5 1.6 0.059 0.063
D1 1.5 0.059
E 1.65 1.85 0.065 0.073
F 7.4 7.6 0.291 0.299
K0 2.55 2.75 0.100 0.108
P0 3.9 4.1 0.153 0.161
P1 7.9 8.1 0.311 0.319
P2 1.9 2.1 0.075 0.082
R 40 1.574
W 15.7 16.3 0.618 0.641
* on sales type
mm inch
MIN. MAX. MIN. MAX.
BASE QTY BULK QTY
2500 2500
9/10
STD2NB50/STD2NB50-1
10/10
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such informa tion n or for an y infring ement of patent s or other rig hts of third part ies which may resu lt from its use . No l i cen se i s
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical compo nents in life support devices or systems without express written approval of STMicroelectronics.
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