STD2NA50
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR
PRELIMINARY DATA
■ TYPICAL R
DS(on)
= 3.25 Ω
■ ± 30V GATE TO SOURCE VOLTA GE RATING
■ 100% AVALANCHE TESTED
■ REPETITIVE AVA LANCHE DATA AT 100
o
C
■ LOW INTRINSIC CAPACITANCES
■ GATE CH ARGE MINIMIZED
■ REDUCED THRESHOLD VO LTA GE SPREA D
■ THROUGH-HO LE IPAK (TO -251) POWE R
PACKAGE IN TU BE (SUFFIX "-1")
■ SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX "T4")
APPLICATIONS
■ MEDIUM CURRENT, HIGH SPEED
SWITCHING
■ SWITCH MODE P OW ER SUP P LIE S (S MP S)
■ CONSUMER AND INDUSTRIAL LIGHTING
INTERNAL SCHEMATIC DIAGRAM
ABSOL UT E MAXIMU M RATINGS
Symbol Parameter Value Unit
V
DS
Drain-source Voltage (VGS = 0) 500 V
V
DGR
Drain- gate Voltage (RGS = 20 kΩ) 500 V
V
GS
Gate-source Voltage ± 30 V
I
D
Drain Current (continuous) at Tc = 25 oC 2.2 A
I
D
Drain Current (continuous) at Tc = 100 oC 1.4 A
I
DM
(•) Drain Current (pulsed) 8.8 A
P
tot
Total Dissipation at Tc = 25 oC45W
Derating Factor 0.36 W/
o
C
T
stg
Storage Temperature -65 to 150
o
C
T
j
Max. Operating Junction Temperature 150
o
C
(•) Pulse width limited by safe operating area
TYPE V
DSS
R
DS(on)
I
D
STD2NA50 500 V < 4 Ω 2.2 A
March 1996
3
2
1
IPAK
TO-251
(Suffix "- 1")
1
3
DPAK
TO-252
(Suffix "T4")
1/6