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STP80NF75L
STB80NF75L STB80NF75L-1
N-CHANNEL 75V - 0.008 Ω - 80A TO-220/D2PAK/I2PAK
STripFET™ II POWER MOSFET
TYPE
STP80NF75L
STB80NF75L
STB80NF75L-1
■ TYPICAL R
■ EXCEPTIONA L dv/d t CAPABILITY
■ 100% AVALANCHE TESTED
■ LOW THRESHOLD DRIVE
V
DSS
75 V
75 V
75 V
(on) = 0.008 Ω
DS
R
DS(on)
<0.01
<0.01
<0.01
I
D
80 A
Ω
80 A
Ω
80 A
Ω
DESCRIPTION
This Power MOSFET is the latest dev elo pment of
STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■ HIGH CURRENT, HIGH SWITCHING SPEED
■ MOTOR CONTROL, AUDIO AMPLIFIERS
■ DC-DC & DC-AC CONVERTERS
■ SOLENOID AND RELAY DRIVERS
3
1
D2PAK
TO-263
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
2
PAK
I
TO-262
3
2
1
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
(
I
•)
D
I
D
(
I
••)
DM
P
tot
dv/dt
E
AS
T
stg
T
j
(•)Current Limited by Package
(
Pulse wi dth limited by safe operating ar ea.
••)
.
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
75 V
75 V
Gate- source Voltage ± 16 V
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
80 A
80 A
Drain Current (pulsed) 320 A
Total Dissipation at TC = 25°C
300 W
Derating Factor 2 W/°C
(1)
Peak Diode Recovery voltage slope 12 V/ns
(2)
Single Pulse Avalanche Energy 930 mJ
Storage Temperature
Max. Operating Junction Temperature
≤80A, di/dt ≤960A/ µ s , VDD ≤ V
(1) I
SD
(2) Starting Tj = 25 oC, ID = 40A, VDD= 40V
-55 to 175 °C
(BR)DSS
, Tj ≤ T
JMAX
1/11November 2001
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STB80NF75L/-1/ STP80NF75L
THERMA L D ATA
Rthj-case
Rthj-amb
T
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Maximum Lead Temperature For Soldering Purpose
l
Max
Max
Typ
0.5
62.5
300
°C/W
°C/W
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
= 250 µA, VGS = 0
D
V
= Max Rating
DS
V
= Max Rating TC = 125°C
DS
V
= ± 16V
GS
75 V
1
10
±100 nA
ON
V
(BR)DSS
I
DSS
I
GSS
(*)
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
Resistance
= VGS I
DS
= 5 V ID = 40 A
V
GS
V
= 10 V ID = 40 A
GS
= 250 µA
D
1 1.6 2.5 V
0.01
0.008
0.013
0.010
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(*)
g
fs
C
iss
C
oss
C
rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
= 25 V ID= 40 A
DS
= 25V, f = 1 MHz, VGS = 0
V
DS
50 S
5000
835
360
µA
µA
Ω
Ω
pF
pF
pF
2/11
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STB80NF75L/-1/ STP80NF75L
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
= 37 V ID = 40 A
t
d(on)
Turn-on Delay Time
t
r
Rise Time
V
DD
R
= 4.7 Ω VGS = 4.5 V
G
(Resistive Load, Figure 3)
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
= 60 V ID= 80 A VGS= 5V
V
DD
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
= 37V ID = 40 A
t
d(off)
Turn-off Delay Time
t
f
Fall Time
V
DD
R
= 4.7Ω, V
G
GS
= 4.5 V
(Resistive Load, Figure 3)
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulsed: P ul se duration = 300 µs, duty cycle 1. 5 %.
(
•)Pulse width limited by safe operating ar ea.
Source-drain Current
(•)
Source-drain Current (pulsed)
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
= 80A VGS = 0
SD
= 80 A di/dt = 100A/µs
I
SD
V
= 25 V Tj = 150°C
DD
(see test circuit, Figure 5)
30
145
110
20
55
130
90
105
340
9
140 nC
80
320
1.5 V
ns
ns
nC
nC
ns
ns
A
A
ns
nC
A
Thermal ImpedanceSaf e Operating Ar ea
3/11
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STB80NF75L/-1/ STP80NF75L
Output Characteristics Transfer Characteristics
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
4/11