SGS Thomson Microelectronics STP6NC80ZFP, STP6NC80Z, STB6NC80ZT4, STB6NC80Z-1, STB6NC80Z Datasheet
1/13December 2002
STP6NC80Z - STP6NC80ZFP
STB6NC80Z - STB6NC80Z-1
N-CHANNEL 800V - 1.5Ω - 5.4A TO-220/FP/D²PAK/I²PAK
Zener-Protected PowerMESH™III MOSFET
■ TYPICAL R
DS
(on) = 1.5 Ω
■ EXTREMELY HIGH dv/dtAND CAPABILITY
GATE-TO- SO URCE ZENER DIODES
■ 100% AVALANCHE TESTED
■ V ER Y LOW GATE INPUT RESISTANCE
■ GAT E CHARGE MINIMIZED
DESCRIPTION
The third generation of MESH OVERLAY™ Power
MOSFETs for very high voltage exhibits unsurpassed
on-resistance per unit area while integrating back-toback Zener diodes bet ween gate and source. Such arrangement gives extra ESD capability with higher ruggedness performance as requested b y a large variety
of single-switch applications.
APPLICATIONS
■ S INGLE -ENDED S MPS IN MONITORS,
COMPUTER AND INDUSTRIAL APPLICATION
■ WELDING EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
(•)Pulse width limited by safe operating area
TYPE V
DSS
R
DS(on)
I
D
STP6NC80Z/FP 800V < 1.8 Ω 5.4 A
STB6NC80Z/-1 800V < 1.8 Ω 5.4 A
Symbol Parameter Value Unit
STP(B)6NC80Z(-1) STP6NC80ZFP
V
DS
Drain-source Voltage (VGS=0)
800 V
V
DGR
Drain-gate Voltage (RGS=20kΩ)
800 V
V
GS
Gate- source Voltage ± 25 V
I
D
Drain Current (continuous) at TC= 25°C
5.4 5.4(*) A
I
D
Drain Current (continuous) at TC= 100°C
3.4 3.4(*) A
I
DM
(1)
Drain Current (pulsed) 21 21(*) A
P
TOT
Total Dissipation at TC= 25°C
125 40 W
Derating Factor 1 0.32 W/°C
I
GS
Gate-source Current (●)±50mA
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=15KΩ) 3KV
dv/dt Peak Diode Recovery voltage slope 3 V/ns
V
ISO
Insulation Winthstand Voltage (DC) -- 2000 V
T
stg
Storage Temperature –65 to 150 °C
T
j
Max. Operating Junction Temperature 150 °C
(1)ISD≤5.4A,di/dt ≤100A/µs, VDD≤ V
(BR)DSS,Tj≤TJMAX
.
(*)Pulse width Limited by maximum temperature allowed
TO-220
1
2
3
TO-220FP
1
2
3
I²PAK
(Tabless TO-220)
1
3
D²PAK
STP6NC80Z/FP/STP6NC80Z-1
2/13
THERMAL DATA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
ON (1)
DYNAMIC
TO-220 / D²PAK /
I²PAK
TO-220FP
Rthj-case Thermal Resistance Junction-case Max 1 3.13 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 30 °C/W
T
l
Maximum Lead Temperature For Soldering Purpose 300 °C
Symbol Parameter Max Value Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
5.4 A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 °C, ID=IAR,VDD=50V)
237 mJ
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 250 µA, VGS=0
800 V
∆BV
DSS
/∆T
J
Breakdown Voltage Temp.
Coefficient
I
D
=1mA,VGS=0
0.9 V/°C
I
DSS
Zero Gate Voltage
Drain Current (V
GS
=0)
V
DS
= Max Rating
1µA
V
DS
= Max Rating, TC= 125 °C
50 µA
I
GSS
Gate-body Leakage
Current (V
DS
=0)
V
GS
= ±20V
±10 µA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
Gate Threshold Voltage
V
DS=VGS,ID
= 250µA
345V
R
DS(on)
Static Drain-source On
Resistance
VGS=10V,ID=3A
1.5 1.8 Ω
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
fs
(1) Forward Transconductance VDS>I
D(on)xRDS(on)max,
ID=3A
7S
C
iss
Input Capacitance
V
DS
=25V,f=1MHz,VGS=0
1600 pF
C
oss
Output Capacitance 125 pF
C
rss
Reverse Transfer
Capacitance
12 pF
3/13
STP6NC80Z/FP/STP6NC80Z-1
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
GATE-SOURCE ZENER DIODE
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. ∆V
BV
= αT(25°-T)BV
GSO
(25°)
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIOD ES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’ s
ESD capability, but also t o make them safely absorb possible voltage transients that may occasionally
be applied from gate to source. In this respect the Zen er voltage is ap propriat e to achieve an efficient
and cost-effective intervention to prot ec t the device’s integrity. These integrated Zener diodes thus avoid
the usage of external components.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Turn-on Delay Time
V
DD
=400V,ID=3A
RG= 4.7Ω VGS=10V
(see test circuit, Figure 3)
26 ns
t
r
Rise Time 10 ns
Q
g
Total Gate Charge
V
DD
=640V,ID= 6A,
VGS=10V
45 nC
Q
gs
Gate-Source Charge 12 nC
Q
gd
Gate-Drain Charge 18 nC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
r(Voff)
Off-voltage Rise Time
V
DD
= 640V, ID=6A,
R
G
=4.7Ω, VGS= 10V
(see test circuit, Figure 5)
11 ns
t
f
Fall Time 13 ns
t
c
Cross-over Time 19 ns
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
Source-drain Current 5.4 A
I
SDM
(2)
Source-drain Current (pulsed) 21 A
V
SD
(1)
Forward On Voltage
ISD= 5.4 A, VGS=0
1.6 V
t
rr
Reverse Recovery Time
ISD= 6 A, di/dt = 100A/µs,
VDD=50V,Tj= 150°C
(see test circuit, Figure 5)
850 ns
Q
rr
Reverse Recovery Charge 8.1 µC
I
RRM
Reverse Recovery Current 19 A
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs=± 1mA (Open Drain) 25 V
αT Voltage Thermal Coefficient T=25°C Note(3) 1.3
10
-4
/°C
Rz Dynamic Resistance
I
D
=50mA,VGS=0
90 Ω
STP6NC80Z/FP/STP6NC80Z-1
4/13
Safe Operating Area For TO-220FPSafe Operating Area For TO-220 /D²PAK/I²PAK
Thermal Impedance For TO-220 /D²PAK/I²PAK
Output Characteristics
Thermal Impedance For TO-220FP
Transfer Characteristics
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