SGS Thomson Microelectronics ST7MDTX-EMU2B-DS Datasheet

February 2000 1/4

ST7MDTx-EMU2B

REAL-TIME DEVELOPMENT TOOLS

FOR THE ST7 MCU FAMILY

FEATURES

■ A common Hardware Development System

mainframe supports the entire ST7 family of
MCUs, in conjunction with the appropriate
ST7xxx-DBE Active Probe.

■ Real-time source level emulation allows viewing

and breakpoint setting on high level source
code rather than o n disassembled target code
for optimum user friendliness.

■ 64 KBytes of user modifiable and conf igurable

emulation RAM, allows memory mapp ing of all
ST7 family devices as well as modelling
hypothetical memory configurations.

■ Unlimited breakpoints may be set for any op-

code fetch or any address access, and
conditions may be defined for the generation of
2 external synchronization signals.

■ 1K by 32-bit wide t race memory allows complex

and sequential events to be defined on any
combination of address and data, as well as 3
internal and 5 external logic signals.

■ User defined events may trigger a breakpoint or

simply define data capture parameters, in
accordance with user preferences.

■ Simple connection of the emulator system to the

Host PC via parallel port.

■ Emulation syst em may be driven by a Windows-

based GNU debugger software or DOS
software running on host PC, allowing full
control and monitoring of hardware resources.

■ Multiple windows allow concurrent real-time

display of source code, MCU resources, internal
registers, trace data, etc.

■ Log files allow storage and subsequent

redisplay of any displayed screen for
subsequent analysis.

■ Command files can be used to execute a set of

debugger commands in batch mode.

■ Editable configuration files ensure tailoring of

working environment to user preferences.

■ Special Function Register window - symbolic

display of SFR

.

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ST7MDTx-EMU2B

OVERVIEW

The ST7 real-time development tools consist of
various hardware and software components,
which together form a flexible and sophisticated
system designed to provide comprehensive devel­opment support for the ST7 family of MCUs.

The Hardware Development System (HDS) main­frame is common to all ST7 devices and, in con­junction with various active probes, allows em ula­tion and development of specific devices. Only the
probe needs to be changed to emulate a new ST7
family device.

The development system is controlled by a Host
PC on which a choice of Windows-based software
may be run. The Host PC is simply c onnected to
the Emulator Mainframe by means of a parallel
port. The STVD7 Windows Debugger software
suite is supplied as standard issue with the Emu­lator hardware, in addition to the conventional
DOS ST7 Software suite, which includes a mac­roassembler, a linker/loader. Third party C Tool­chain and Debugger software is also available.
The Windows-based debugger provides a user
friendly and highly flexible interface which may be

configured to precisely match the u ser’s require­ments. All emulator settings are accessible via the
control software.

Once assembled, and/or compiled and li nked, the
application software may be downloaded to the
real-time emulation memory, which can be config­ured, mapped and modified as required by the us­er. The device probe is then connected to the ap­plication target hardware in place of the MCU and
real-time emulation of the target application can
begin, thus allowing sophisticated testing and de­bugging of both application hardware and soft­ware.

User definable breakpoints allow t he MCU to be
halted when the application software accesses
specific addresses, and/or addresses within a se­lected range, and/or on data fetch cycles. The
user may then read and modify any register and
memory location. An on line assembler/disassem­bler is also available to ease debugging.

An important fe ature of the ST7 d e ve l opment sys­tem is that true source level debugging is possible,
meaning code may be v ie wed at sourc e level an d
breakpoints may be s et on high level c ode, rather
than on disasse mbled target code. This is muc h
more meaningful to the user and ensures a more
convivial and productive development environ­ment.

A separate and concurrent Logic Analyzer func­tion is available. This hardware implemented func­tion features 1KByte of 32-bit wide trace memory
which allows events to be defined f or any combi­nation of address (16 bits) and data (8 bits), as
well as according to the state of 3 internal and 5
external logic signals. Complex and sequential
conditions may be defined, and all bits are maska­ble. The external sig nals are input from 5 probes
which can be connected to the target hardware.

Trace memory events may be used as break­points or simply to trigger data acquisition accord­ing to user specified param eters, without halting
the target system. Such a powerfu l tool enables
the user to detect an d trap virtually any pattern,
and thus rapidly debug the target application.

Log files offer the ability to send any screen dis­play to a text file. In pa rticular, log files are very
useful to save t he contents of the logic analyzer
and/or the contents of data registers to be subse­quently analysed or printed.

Command files can be used to execute a set of
debugger commands in batch mode, to simplify
and speed up the emulation session.

The SFR window offers symbolic display of the
SFRs, showing the peripherals, sym bolic display
of the registers.

Finally, when the target program is fully de­bugged, the appropriate ST7 EPROM/OTP/
FLASH prog ramming board can be us ed to pro­gram the EPROM /OTP/FLAS H version of the tar­get device to allow stand-alone testing and evalu­ation.

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