Tx CARRIER FREQUENCY SYNTHESIZED
FROM EXTERNAL CRYSTAL
.
LOW DISTORTION Tx SIGNAL
.
Rx SENSITIVITY BETTER THAN 1mV
.
CARRIER DETE CT ION
.
WATCH-DOG INPUT
.
RESET AND MASTER CLOCK OUTPUTS
FOR MICROCONTRO LLER
.
POWER AMPLIFIER BIAS CURRENT CONTROL (HIGH IMPEDANCE IN Rx MODE)
.
SIMPLE AND ECONOMICAL APPLICATION
SCHEMATICS
.
COMPATIBLE WITH CENELEC EN 50065-1
AND FCC SPECIFICATION
.
CARRIER DETECT CLAMPING ON RxD
PROGRAMMABLE (ALLOWING DEMODULATION ON VERY LOW RECEIVE LEVEL,
1mV
TYPICAL LY)
RMS
RMS
ST7537HS1
HOME AUT O MATION MO DE M
PLCC28
(Plastic Chip Carrier)
ORDER CODE : ST7537HS1
DESCRIPTIO N
The ST7537HS1 is a half duplex asynchronous
FSK MODEM designed for home automation communication on the domestic electric mains which
complies with the EN 50065-1 CENELEC standard.
It mainly operates from a 10V power supply and a
5V power supply for the microcontroller digital interface.
It is interfaced to the power line by an external
driver, and a transformer (see Application Schematic Diagram). Its data transmission rate is
2400 bps and its carrier frequency is 132.45kHz.
June 1995
PIN CONNECTIONS
RxFO
RAI
3
4
TxIFI
PAFB
ATO
PABC
PABC
TEST1
TEST2
5
6
7
8
9
10
11
12
TEST3
13
TEST4
AV
DV
DD
2
14
DD
V
DV
CM
1
15
SS
AV
XTAL1
28
16
SS
DEMI
IFO
26
27
25
DV
CC
24
RSTO
23
RxD
22
TxD
21
CD
20
Rx/Tx
19
WD
18
17
MCLK
XTAL2
7537H-01.EPS
1/9
Page 2
ST7537HS1
PIN DESCRIPTION
Pin
Name
V
CM
AV
DD
RAI3AnalogReceive Analog Input
RxFO4AnalogReceive Filter Output
TxIFI5AnalogTransmit and Intermediate Frequency Filters Test Input (mode TEST3)
PAFB6AnalogPower Amplifier Feed-back Input
ATO7AnalogAnalog Transmit Output
PABC8Digital (10V)Power Amplifier Bias Current Control Complementary Output
PABC9Digital (10V)Power Amplifier Bias Current Control Output
TEST110DigitalTx to Rx Automatic Mode Switching Control Input
TEST211DigitalAutomatic Mode Switching Time and Watch-dog Time Reduction Control Input
TEST312DigitalTxIFI Selection Input
TEST413DigitalUndelayed Reset Input
RxD23DigitalReceive Data Output
RSTO24DigitalReset Output
DV
CC
IFO26AnalogIntermediate Frequency Filter Output
DEMI27AnalogDemodulator Input
AV
SS
Pin
Number
Pin
Type
1AnalogCommon Mode Voltage
2SupplyAnalog Power Supply : 10V ±5 %
14SupplyDigital Power Supply : 10V ±5%
15SupplyDigital Ground : 0V
25SupplyDigital Buffers Supply Voltage : 5V ±5 %
28SupplyAnalog Ground : 0V
Description
7537H-01.TBL
2/9
Page 3
BLOCK DIAG RAM
AV
DD
2142815125
DV
DD
AV
DV
SS
SS
V
CM
DV
ST7537HS1
CC
RAI
RxFO
CD
ATO
PAFB
PABC
PABC
RxD
3
4
21
7
6
9
8
23
TEST1TEST2TEST3TEST4
Rx BAND-PASS
A.A.
FILTER
CARRIER
DETECTION
OUTPUT
AMPLIFIER
TEST LOGIC
S.C. FILTER
SMT.
FILTER
SMT.
FILTER
REFERENCE
Tx BAND-PASS
S.C. FILTER
13121110
20dB GAIN
VOLTAGE
TRANSMIT SECTION
The transmit mode is set when Rx/
Tx = 0, if R x/Tx
is held at 0 longer than 1 second, then the device
switches automatically in the Rx mode. A new
activation of the Tx mode requires Rx/
Tx to be
returned to 1 for a minimum 2 microsecond period
before being set to 0.
The Transmit Data (TxD) enter asynchronously the
FSK modulator with a nominal intra-message data
rate of 2400 bps.
The basic transmit frequencies are :
- f(TxD=0) = 133.05kHz
- f(TxD=1) = 131.85kHz
These frequencies are synthesized from a
11.0592MHz crys tal oscillator; their precis ion is the
same as the crystal one’s (100ppm).
The modulated signal coming out of the FSK modulator is filtered by a switched-capacitor band-pass
filter (Tx band-pass) in order to limit the output
spectrum and to reduce the level of harmonic components.
The final stage of t he Tx path co nsists of an operational amplifier which needs a feed-back signal
(PAFB) from the power amplifier as shown on
Application Schematic Diagram.
In Tx mode the Rec eive Data (R xD) signa l is set to 1.
MUX
POST-DEMO
S.C. FILTER
MUX
A.A. FILTER
A.A. FILTER
CORRELATOR
FSK DEMODULATOR
I.F. BAND-PASS
S.C. FILTER
MODULATOR
SMT.
FILTER
TIME BASE
RESET LOGIC
CONTROL LOGIC
FSK
IFO
26
17
XTAL2
16
XTAL1
18
MCLK
19
WD
24
RSTO
20
Rx/Tx
22
TxD
TxIFI
5
27
DEMI
ST7537HS1
RECEIVE SECTION
The receive section is active when Rx/
Tx = 1.
The Rx signal is applied on RAI and filtered by a
band-pass switched capacitor filter (Rx b and-pass)
centered on the carrier frequency and whose bandwidth is around 12kHz.
The Rx filter output is amplified by a 20dB gain
stage which provides symetrical limitations for
large voltage. The resulting signal is down-converted by a mixer which receives a local oscillator
synthesized by the FSK modulator block. Finally an
intermediate frequency band-pass filter (IF bandpass) whose central frequency is 5.4k Hz improves
the signal to noise ratio before entering the FSK
demodulator.
The coupling of the intermediate frequency filter
output (IFO) to the FSK demodulator input (DE MI)
is made by an external capacitor C5 (100nF ±10%,
10V) which cancels the Rx path offset voltage.
The RxD output delivers the demodulated signal if
the carrier detect (
high level when
CD) signal is low and is set to
CD = 1.
The RxD output can delivers the demodulated
signal whatever the lev el of
CD (0 or 1) if R x/Tx = 1
and TxD = 0 (see Figure 1).
7537H-02.EPS
3/9
Page 4
ST7537HS1
Figure 1 : Data Timing Chart
Rx/Tx
CD
TxD
RxD
DATADATA
ADDITIONAL DIG ITAL AND ANALOG F UN CTIONS
Time base
A time base section delivers all the internal clocks
from a crystal oscillator (1 1.0592MHz). The cryst al
is connected between XT AL1 and XT AL2 pins and
needs two external capacitors C3 and C4 (22pF
±10%, 10V) for proper operation.
Reset and watch-dog
The reset output (RSTO) is driven high when the
supply voltage is low er than Vrh (typically 7.6V) with
an hysteresis V rh-V rl (typically 300m V) or when n o
negative transition occurs on the watch-dog input
(
WD) for more than 1.5 second (see the timing
chart on Figure 2). When a reset occurs RSTO is
held high for at least 50ms.
Signal detection
The Carrier Detect output (
CD) is driven low when
the input signal amplitude on RAI is greater than
V
for at least TCD (typically 6ms see the timing
CD
chart on Figure 3). When the input signal desappears or becomes lower than V
for at least T cd before returning to a high level. V
, CD is held low
CD
CD
is the carrier detection threshold voltage which is
set internally to detect 5mV
RMS
typically.
External power amplifier bias control
Two dedicated digital output (PABC and
PAB C)
delivering a signal between 0V and 10V are driven
low respectively hi gh, when the circuit is set in the
receive mode (Rx/
Tx=1) or when the transmit mo de
time out (1 second) is exceeded; in the same time
the output A TO is put in a high impedance state.
TEST IN G FEATURE S
- An additionnal amplifier allows the observation of
the Rx band-pass filter output on pin RxFO.
- A direct input to the Tx b and-pass filter and to the
IF filter (TxIFI) is selected when TEST3 = 1.
- The 1 second normal duration of the Tx to Rx
mode automatic switching is reduced to 488µs
and the 1.5 second watch-dog time out is reduced
to 46.3µs when TEST2 = 1.
- When TEST1 = 1 the Tx to Rx mode automatic
switching is desactivated and the functional mode
of the circuit is fully controlled by Rx/
Tx.
- TEST4 is a reset input which allows an undelayed
control of RSTO and of the internal state of the
circuit.
POWER SUPPLIES WIRING PRECAUTIONS
The ST7537HS1 has two positive power supply
terminals (AV
(AV
,DVSS) in order to separate internal analog
SS
,DVDD) and two ground terminals
DD
and digital supplies. The analog and digital terminals of each supply pair must be connected together externally for proper operation.
The V
must be protected against s hort -circuit for
DD
proper operation.
7537H-03.EPS
4/9
Page 5
ST7537HS1
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
/DVDDSupply Voltage (1)- 0.3, + 12V
AV
DD
V
V
O
V
O
I
O
V
V
O
I
O
P
D
T
oper
T
stg
Notes :1. The voltages are referenced to AV
GENERAL ELECTRICAL CHARACTERISTICS
(A/DV
DD
SymbolParameterTest ConditionsMin.Typ. Max.Unit
AV
DD
DV
DD
AI
+
DD
DI
DD
DV
CC
DI
CC
V
IH
V
IL
V
OH
V
OL
DCDuty CycleMCLK Output, C
Digital Input VoltageDVSS - 0.3, DVDD + 0.3V
I
Digital Output Voltage (microcontroller interface)DVSS - 0.3, DVCC + 0.3V
Digital Output Voltage (PABC and PABC)DVSS - 0.3, DVDD + 0.3V
Digital Output Current- 5, + 5mA
Analog Input VoltageAVSS - 0.3, AVDD + 0.3V
I
Analog Output VoltageAVSS - 0.3, AVDD + 0.3V
Analog Output Current- 5, + 5mA
Power Dissipation500mW
Operating Temperature0, + 70
Storage Temperature- 55, + 150
and DVSS.
2. Absolute maximum ratings are values beyond which damage to device may occur . Functio nal operation under
these conditions is not implied.
= 10V, A/DVSS = 0V, DVCC = 5V and 0oC ≤ T
SS
≤ 70oC, unless otherwise specificied)
amb
Supply Voltage9.51010.5V
Supply Current30mA
Digital Output Supply Voltage4.755.25V
Digital Output Supply Current1.5mA
High Level Input VoltageDigital Inputs4.2V
Low Level Input VoltageDigital Inputs0.8V
High Level Output VoltageIOH = -100µA
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility
for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result
from its use. No licence is granted by implication or otherwi se under any patent or patent rights of SGS-THOMSON Microelectronics.
Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously suppli ed. SGS-THOMSON Microele ctronics products are not authorized for use as critical components in life
support devices or systems without express written approval of SGS-THOMSON Microelectronics.