SGS Thomson Microelectronics ST16STG2 Datasheet

1/2

DATA BRIEFING

This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact
your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: [phone]

ST16ST2G

Smar tcard MC U

With up to 16352 Bytes EEPROM & T2G

+

Authenti catio n Libr ary

■ 8 BIT ARCHITECTURE CPU

■ 15 K Bytes of USER ROM

■ 1 K Byte of T2 G

+

AUTHENTICATION LIBRARY

■ 1.5 K Byte of SYSTEM ROM

■ 384 Bytes of RAM

■ Up to 16352 Bytes of EEPR O M, SECTOR

COMBINATIVE

– Highly reliable CMOS EEPROM technology
– 10 year data retention
– 100,000 Erase/Write cycle endurance
– Protected One Time Programmable block (32

or 64 bytes)

– 1 to 32 Byte block Erase or Write in single cy-

cle programming

■ SERIAL ACCESS, ISO 7816-3 COMPAT IBLE

■ EXTENDED VOLTAGE OPERATION

–V

CC

Range: 2.7 V to 5.5 V

–I

CC

Operating:4 mA at 5 V (typical)

1.6 m A at 3 V (typical)

■ POWER SAVING STANDBY MODE

–I

CC

Stand-by: 20 µA at 5 V (typical)

4 µA at 3 V (typical)

■ UP TO 5 MHz INTERNAL OPERATING

FREQUENCY

■ VERY HIGH SECURITY FEATURES

INCLUDING EEPROM FLASH ERASE

■ CONTACT ASSIGNMENT COMPATIBLE ISO

7816-2

■ ESD PROTECTION GRE ATE R THA N 5000V

■ 2 OPERATING CONFIGURATIONS

–ISSUER
– USER

■ MEETS GSM 11.11 AND 11.12

SPECIFICATIONS Contact Name

T2G

+

SPECIFIC FEATURES

■ AntiClone Function* by France Telecom

■ FRANCE TELECOM LICENCE

■ T2G

+

AUTHENTICATION LIBRARY WITH
CBC** (to build Security Module for ST133x and
ST13 5x ICs)

■ DEDICATED SOFTWARE TOOLS

■ T2G

+

Authentication Library
– Emulator with pseudo-ACF*
– Manager with full ACF*
– System ROM Library

* AntiClone Function = ACF
** Cipher Block Chaining Mechanism = CBC

Wafer

Micromodule (D3)

3

3

3

3

October 1999

ST16ST2G

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DESCRIPTION

The ST16ST2G, a member of the standard
ST16SF4x device family, is a serial access micro­controller especially designed for high volume and
cost competitive Smartcard applications where
firmware security algorithm must be implemented.

The ST16ST2G is based on 8 bit CPU core and in­cludes on chip memories: 384 Bytes of RAM, 15 K
Bytes of USER ROM, 1.5 K Byte of SYSTEM
ROM, and up to 16352 Bytes of EEPROM. The
ST16ST2G also includes 1 KByte of T2G

+

Authen-

tication Library.

Both ROM and EEPROM m emories can b e confi g­ured into two sectors. Access rules from any mem­ory section or sector to any other are set-up by the

User’s defined Memory Access Control Matrix
(MACM).

Reliability data related to the S T16ST2G product
manufactured using STMicroelectronics advanced
CMOS EEPROM technology confirm data reten­tion up to 10 y ears and endurance up to 100,000
Erase/Write cycles.

As with all other ST16 family members, the
ST16ST2G is fully compatible with the ISO stand­ards for Smartcard applications.

Software development (ROM code, options) can
be completed by the ST16-19HDSE development
system.

The ST16ST2G can be delivered either in unsawn
or sawn wafers, 180 or 275 micron thickness as
well as in micromodule package.

For ordering information and request for quot ation
(RTQ) please contact your nearest ST sales office.

Figure 1. Block Diagram

SCP 102b/DS

MEMORY ACCESS CONTROL MATRIX

CPU

BYTES

SERIAL I/0's
INTERFACE

NUMBER

GENERATOR

INTERNAL BUS

RAM

SECT. ASECT.

B

SECTOR

A

SECTOR

B

SECTORS

COMBIN.

ROM

V GENERATION

EEPROM

SECTORS COMBINATIVE

RST

GND

V

I/O1

CLK

SYSTEM

ROM

SECT.

S

SECURITY

LOGIC

I/O2

PP

CC

8 BIT

384

1.5 K

BYTE

15 K BYTES

Up to 16352 BYTES