The M54/74HC4094 is a high speed CMOS 8 BIT
SIPOSHIFTLATCH REGISTERfabricatedwithsilicon gate C2MOS technology.
It has the same high speed performance of LSTTL
combined withtrue CMOSlow power consumption.
This deviceconsists of an 8-bit shiftregister and an
8-bit latch with 3-state output buffer.Data is shifted
serially through the shift register on the positive
going transition of the clockinput signal.Theoutput
of the last stage (Qs) can be used to cascadeseveraldevices.
DataontheQs outputistransferredtoa secondoutput (Qs’) on the following negative transition of the
clockinputsignal. Thedataof eachstageoftheshift
register is provided with a latch,which latches data
on the negative going transition of the STROBE
inputsignal. When the STROBE input is held high,
datapropagatesthroughthelatchtoa3-stateoutput
buffer.
This buffer is enabled when OUTPUT ENABLE
inputistakenhigh. Allinputsare equipped with protectioncircuitsagainststaticdischarge andtransient
excess voltage.
Supply Voltage-0.5 to +7V
DC Input Voltage-0.5 to VCC+ 0.5V
I
DC Output Voltage-0.5 to VCC+ 0.5V
DC Input Diode Current± 20mA
DC Output Diode Current± 20mA
DC Output Source Sink Current Per Output Pin± 25mA
DC VCCor Ground Current± 50mA
GND
Power Dissipation500 (*)mW
Storage Temperature-65 to +150
Lead Temperature (10 sec)300
L
Supply Voltage2 to 6V
Input Voltage0 to V
Output Voltage0 to V
Operating Temperature: M54HC Series
M74HC Series
CC
CC
-55 to +125
-40 to +85
Input Rise and Fall TimeVCC= 2 V0 to 1000ns
V
= 4.5 V0 to 500
CC
V
= 6 V0 to 400
CC
o
C
o
C
V
V
o
C
o
C
4/12
DC SPECIFICATIONS
SymbolParameter
V
V
V
V
I
I
High Level Input
IH
Voltage
Low Level Input
IL
Voltage
High Level
OH
Output Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
3 State Output
OZ
Off State Current
Quiescent Supply
CC
Current
M54/M74HC4094
Test ConditionsValue
T
=25oC
V
(V)
CC
A
54HC and 74HC
Min.Typ.Max.Min.Max.Min.Max.
2.01.51.51.5
4.53.153.153.15
6.04.24.24.2
2.00.50.50.5
4.51.351.351.35
6.01.81.81.8
2.0
4.54.44.54.44.4
6.05.96.05.95.9
4.5I
6.0I
2.0
4.50.00.10.10.1
6.00.00.10.10.1
4.5I
6.0I
6.0
=
V
I
IO=-20 µA
V
IH
or
V
IL
=-4.0 mA 4.184.314.134.10
O
=-5.2 mA 5.685.85.635.60
O
V
=
I
IO=20µA
V
IH
or
V
IL
= 4.0 mA0.170.260.370.40
O
= 5.2 mA0.180.260.370.40
O
VI=VCCor GND±0.1±1±1µA
6.0VI=VIHor V
1.92.01.91.9
0.00.10.10.1
IL
VO=VCCor GND
6.0 VI=VCCor GND44080µA
-40 to 85oC
74HC
-55 to 125oC
54HC
Unit
±0.5±5.0±10µA
V
V
V
V
5/12
M54/M74HC4094
AC ELECTRICAL CHARACTERISTICS (CL=50pF,Inputtr=tf=6ns)
Test ConditionsValue
T
=25oC
SymbolParameter
t
t
TLH
THL
Output Transition
Time
V
CC
(V)
2.0307595110
4.58151922
A
54HC and 74HC
Min.Typ.Max.Min.Max.Min.Max.
6.07131619
t
PLH
t
PHL
Propagation
Delay Time
(CLOCK - Qn)
t
t
PLH
PHL
Propagation
Delay Time
(C LOCK-QS ,Q’S)
t
t
PLH
PHL
Propagation
Delay Time
(STROBE - Qn)
t
t
PZL
PZH
3 State Output
Enable Time
2.092200250300
4.526405060
6.020344351
2.065150190225
4.519303845
6.015263238
2.075160200240
4.520324048
6.016273441
2.058150190225
4.516303845
6.013263238
t
t
PHZ
PLZ
3 State Output
Disable Time
2.035150190225
4.516303845
6.013263238
f
MAX
Maximum Clock
Frequency
2.06164.84
4.530662420
6.035802824
t
W(H)
t
W(L)
Minimum Pulse
Width
2.0177595110
4.57151922
6.06131619
t
W(L)
Minimum Pulse
Width
2.0287595110
4.56151922
6.06131619
Minimum Set-up
t
s
Time
(SI)
Minimum Set-up
t
s
Time
(ST)
t
Minimum Hold
h
Time
(SI, ST)
C
C
PD
Input Capacitance5101010pF
IN
(*)Power Dissipation
2.0307595110
4.57151922
6.05131619
2.045100125145
4.510202529
6.08172125
2.0000
4.5000
6.0000
140
Capacitance
(*) CPDisdefined as the valueofthe IC’s internal equivalent capacitance whichis calculated fromthe operating current consumption withoutload.
(RefertoTest Circuit).Average opertingcurrentcanbe obtained bythefollowingequation. ICC(opr) = CPD•VCC•fIN+ICC/2(per FLIP/FLOP)
-40 to 85oC
74HC
-55 to 125oC
54HC
Unit
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
pF
6/12
SWITCHING CHARACTERISTICS TEST WAVEFORM
M54/M74HC4094
TEST WAVEFORM ICC(Opr.)
CPDCALCULATION
CPDis tobe calculatedwith thefollowing formula by using the measured value of I
(Opr.)in the test circuitopposite.
I
(
Opr
CPD=
f
CC
IN
)
×
V
CC
In determining the typical value of CPD,a
relatively high frequency of 1 MHz was applied to fIN, in order to eliminate any error
caused by thequiescent supply current.
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted byimplication or otherwise under any patent or patentrights of SGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproducts are not authorized foruse ascritical componentsin life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics - All Rights Reserved
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