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DUAL J-K FLIP FLOP WITH PRESET
.HIGH SPEED
f
= 71 MHz(TYP.) at VCC=5V
MAX
.LOWPOWERDISSIPATION
ICC=2µAatTA=25°C
.HIGH NOISEIMMUNITY
V
NIH=VNIL
=28%VCC(MIN.)
.OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.SYMMETRICALOUTPUT IMPEDANCE
|IOH|=IOL=4 mA(MIN.)
.BALANCEDPROPAGATION DELAYS
t
PLH=tPHL
.WIDE OPERATINGVOLTAGE RANGE
VCC(OPR)= 2V to 6V
.PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS113
DESCRIPTION
The M54/74HC113 isa highspeed CMOSDUAL JK FLIP FLOP WITH PRESET fabricated in silicon
gate C2MOS technology. It has the same high
speed performance of LSTTL combined with true
CMOSlowpowerconsumption.Thiscircuit offersindividual J, K, set,andclockinputs.Thesemonolithic
dual flip-flops are designed so that when the clock
goesHIGH,the inputsare enabled and data willbe
accepted. The logic levelof the J and K inputs may
be allowed tochange when theclock pulse is HIGH
and the bistable will function as shown in the truth
table as long as minimum set-up times are observed. Input data is transferred to the outputs on
thenegative-going edgeoftheclock pulse.Allinputs
are equipped with protection circuits against static
discharge and transient excess voltage.
M54HC113
M74HC113
B1R
(PlasticPackage)
M1R
(MicroPackage)
ORDER CODES :
M54HC 113F1R M74H C113M1R
M74HC 113B1R M74HC1 13C1R
PIN CONNECTIONS(top view)
F1R
(CeramicPackage)
C1R
(Chip Carrier)
INPUT AND OUTPUT EQUIVALENT CIRCUIT
October 1992
NC =
No Internal
Connection
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M54/M74HC113
TRUTH TABLE
INPUTS OUTPUTS
PR J K CK Q Q
L X X X H L PRESET
HLL Q
n
Q
n
HLH LH
HHL HL
HHH Q
HXX Q
X:Don’t Care
n
n
Q
n
Q
n
LOGI C DI AG RAM
FUNCTION
NO CHANGE
TOGGLE
NO CHANGE
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M54/M74HC113
PIN DESC RIPTION
IEC LOGIC SYMBOL
PIN No SYMBOL NAME AND FUNCTION
1, 13 1CK, 2CK Clock Input (HIGH to
LOW edge triggered)
2, 12 1K, 2K Data Inputs: Flip-Flop 1
and 2
3, 11 1J, 2J Data Inputs: Flip-Flop 1
and 2
4, 10 1PR, 2PR Set Inputs
5, 9 1Q, 2Q True Flip-Flop Outputs
6, 8 1Q, 2Q Complement Flip-Flop
Outputs
7 GND Ground (0V)
14 V
CC
Positive Supply Voltage
ABSOLU TE M AXIMU M R AT INGS
Symbol Parameter Value Unit
V
CC
V
V
O
I
IK
I
OK
I
O
I
or I
CC
P
D
T
stg
T
L
AbsoluteMaximumRatingsarethose values beyondwhichdamage tothedevicemayoccur. Functionaloperationunder these conditionisnotimplied.
(*)500 mW: ≅ 65oC derateto300mWby 10mW/oC: 65oCto85oC
Supply Voltage -0.5 to +7 V
DC Input Voltage -0.5 to VCC+ 0.5 V
I
DC Output Voltage -0.5 to VCC+ 0.5 V
DC Input Diode Current ± 20 mA
DC Output Diode Current ± 20 mA
DC Output Source Sink Current Per Output Pin ± 25 mA
DC VCCor Ground Current ± 50 mA
GND
Power Dissipation 500 (*) mW
Storage Temperature -65 to +150
Lead Temperature (10sec) 300
o
C
o
C
RECO MM ENDED OPERAT I N G CO NDI TIONS
Symbol Parameter Value Unit
V
T
t
V
V
r,tf
Supply Voltage 2 to 6 V
CC
Input Voltage 0 to V
I
Output Voltage 0 to V
O
Operating Temperature: M54HC Series
op
M74HC Series
CC
CC
-55 to +125
-40 to +85
Input Rise and Fall Time VCC= 2 V 0 to 1000 ns
V
= 4.5 V 0 to 500
CC
V
= 6 V 0 to 400
CC
V
V
o
C
o
C
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M54/M74HC113
DC SPECIFICATIONS
Symbol Parameter
V
V
V
V
I
High Level Input
IH
Voltage
Low Level Input
IL
Voltage
High Level
OH
Output Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
Quiescent Supply
CC
Current
Test Conditions Value
V
(V)
CC
=25oC
A
54HC and 74HC
Min. Typ. Max. Min. Max. Min. Max.
-40 to 85oC
74HC
-55 to 125oC
54HC
Unit
T
2.0 1.5 1.5 1.5
4.5 3.15 3.15 3.15
6.0 4.2 4.2 4.2
2.0 0.5 0.5 0.5
4.5 1.35 1.35 1.35
6.0 1.8 1.8 1.8
2.0
4.5 4.4 4.5 4.4 4.4
6.0 5.9 6.0 5.9 5.9
4.5 I
6.0 I
2.0
4.5 0.0 0.1 0.1 0.1
6.0 0.0 0.1 0.1 0.1
4.5 I
6.0 I
6.0
=
V
I
IO=-20 µA
V
IH
or
V
IL
=-4.0 mA 4.18 4.31 4.13 4.10
O
=-5.2 mA 5.68 5.8 5.63 5.60
O
V
=
I
IO=20µA
V
IH
or
V
IL
= 4.0 mA 0.17 0.26 0.33 0.40
O
= 5.2 mA 0.18 0.26 0.33 0.40
O
VI=VCCor GND ±0.1 ±1 ±1 µA
1.9 2.0 1.9 1.9
0.0 0.1 0.1 0.1
6.0 VI=VCCor GND 2 20 40 µA
V
V
V
V
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