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1Mbit (128K x8), 5V Asynchronous SRAM
FEATURES SUMMARY
■ SUPPLY VOLTAGE : 4.5 to 5.5V
■ 128K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 55ns
■ LOW STANDBY CURRENT
■ LOW V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STAN DBY POWER
DATA RETENTION: 2V
CC
M68AF127B
Figure 1. Packages
SO32 (MC)
32
1
PDIP32 (B)
TSOP32 (NK)
8 x 13.4 mm
TSOP32 (N)
8 x 20 mm
1/21August 2003
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M68AF127B
TABLE OF CONTENTS
SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 6. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. SO Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 4. DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 5. TSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 6. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Operating and AC Measurement Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 7. AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 8. AC Measurement Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Table 4. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Operating Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 9. Address Controlled, Read Mode AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 10. Chip Enable or Output Enable Controlled, Read Mode AC Waveforms. . . . . . . . . . . . . . 9
Table 7. Read and Standby Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Write Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 12. Write Enable Controlled, Write AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 13. Chip Enable Controlled, Write AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 8. Write Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 14. E1 Controlled, Low V
Figure 15. E2 Controlled, Low V
Data R e t e n tion A C Wavefo r ms . . . . . . . . . . . . . . . . . . . . . . . . 14
CC
Data R e t e n tion A C W avefo rms . . . . . . . . . . . . . . . . . . . . . . . . 14
CC
Table 9. Low VCC Data Retention Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
SO32 - 32 lead Plastic Small Outline, Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
SO32 - 32 lead Plastic Small Outline, Package Mechanical Data. . . . . . . . . . . . . . . . . . . . . . . . . . 15
PDIP32 - 32 pin Plastic DIP, 600 mils width, Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
PDIP32 - 32 pin Plastic DIP, 600 mils width, Package Mechanical Data . . . . . . . . . . . . . . . . . . . . 16
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 14. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 15. Document Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
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SUMMARY DESCRIPTION
The M68AF127B is a 1Mbit (1,048,576 bit) CMOS
SRAM, organized as 131,072 words by 8 bits. The
device features fully static operat ion requiring no
external clocks or timing strobes, with equal address access and cycle times. It requires a single
4.5 to 5.5V supply.
This device has an automatic power-down feature,
reducing the power consumption by over 99%
when deselected.
The M68AF127B is available in SO32, PDIP32,
TSOP32 (8x13.4mm) and TSOP32 (8x20mm)
packages.
Figure 2. Logic Diagram Table 1. Signal Names
A0-A16 Address Inputs
M68AF127B
A0-A16
W
E1
E2
V
CC
17
M68AF127B
G
V
SS
8
DQ0-DQ7
AI05472B
DQ0-DQ7 Data Input/Output
E1
E2 Chip Enable
G
W
V
CC
V
SS
Chip Enable
Output Enable
Write Enable
Supply Voltage
Ground
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M68AF127B
Figure 3. SO Connections
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
V
SS
1
8
M68AF127B
9
16 17
32
25
24
AI07270B
V
CC
A15
E2
W
A13
A8
A9
A11
G
A10
E1
DQ7
DQ6
DQ5
DQ4
DQ3
Figure 5. TSOP Connections
A11
A9
A8
A13
E2
A15
V
CC
NC
A16
A14
A12
A7
A6
A5
A4 A3
1
W
8
M68AF127B
9
16 17
32
25
24
AI05473d
G
A10
E1
DQ7
DQ6
DQ5
DQ4
DQ3
V
SS
DQ2
DQ1
DQ0
A0
A1
A2
Figure 4. DIP C on ne ctions
1
NC
2
A16
3
A14
4
A12
5
A7
6
A6
7
A5
8
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
V
SS
M68AF127B
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
AI07203B
V
CC
A15
E2
W
A13
A8
A9
A11
G
A10
E1
DQ7
DQ6
DQ5
DQ4
DQ3
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Figure 6. Block Diagram
A16
A7
ROW
DECODER
M68AF127B
MEMORY
ARRAY
DQ7
DQ0
E1
E2
W
G
Ex
MAXIMUM RATIN G
Stressing the device ab ove the rating listed in the
“Absolute Maximum Ratings” table may cause
permanent damage to the device. These are
stress ratings only and operation of the dev ice at
these or any other conditions above those indicated in the Operating sections of this specification is
I/O CIRCUITS
COLUMN
DECODER
A0 A6
AI05471
not implied. Exposure to Absol ute Maxim um Ra ting conditions for extended periods may affect device reliability. Refer also to the
STMicroelectronics SURE Program and other relevant quality documents.
Table 2. Absolute Maximum Ratings
Symbol Parameter Value Unit
(1)
I
O
T
A
T
STG
V
CC
(2)
V
IO
P
D
Note: 1. One output at a time, not to exceed 1 second duration.
2. Up to a maximum operating V
Output Current 20 mA
Ambient Operating Temperature –55 to 125 °C
Storage Temperature –65 to 150 °C
Supply Voltage –0.5 to 6.5 V
Input or Output Voltage
–0.5 to V
CC
+0.5
Power Dissipation 1 W
of 6.0V only.
CC
V
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M68AF127B
DC AND AC PARAMETERS
This section summarizes the operat ing and measurement conditions, as well as the DC and AC
characteristics of the device. The parameters in
the following DC and AC Characteristic tables are
derived from tests performed under the M easure-
Table 3. Operating and AC Measurement Conditions
Parameter M68AF127B
V
Supply Voltage
CC
Ambient Operating Temperature
ment Conditions listed in the rel evant tables. Designers should check that the operating conditions
in their projects match the measurement conditions when using the quoted parameters.
4.5 to 5.5V
Range 1 0 to 70°C
Range 6 –40 to 85°C
Load Capacitance (C
Output Circuit Protection Resis tance (R
Load Resistance (R
)
L
)
1
)
2
100pF
3.0kΩ
3.1kΩ
Input Rise and Fall Times 1ns/V
Input Pulse Voltages
Input and Output Timing Ref. Voltages
Output Transition Timing Ref. Voltages
V
RL
0 to V
CC
V
/2
CC
= 0.3VCC; VRH = 0.7V
Figure 7. AC Measurement I/O Waveform Figure 8. AC Measurement Load Circuit
V
CC
I/O Timing Reference Voltage
V
CC
0V
Output Transition Timing Reference Voltage
V
CC
0V
VCC/2
0.7V
0.3V
AI04831
DEVICE
UNDER
TEST
R
CC
CC
CL includes JIG capacitance
R
1
OUT
C
L
2
CC
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AI05814
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M68AF127B
Table 4. Capacitance
Symbol
C
C
OUT
Note: 1. Sampled only, not 100% tested.
2. At T
Input Capacitance on all pins (except DQ)
IN
Output Capacitance
= 25°C, f = 1MHz, VCC = 3.0V.
A
Parameter
(1,2)
Table 5. DC Characteristics
Symbol Parameter Test Condition Min Typ Max Unit
V
I
CC1
I
CC2
I
I
LO
I
(1,2)
Supply Current
(3)
Operating Supply Current
Input Leakage Current
LI
(4)
Output Leakage Current
Standby Supply Current CMOS
SB
= 5.5V, f = 1/t
CC
I
OUT
V
CC
0V ≤ V
0V
V
= 5.5V, E1 ≥ V
CC
E2 ≤ 0.2V, f=0
= 0mA
= 5.5V, f = 1MHz,
I
= 0mA
OUT
IN
≤ V
OUT
AVAV
≤ V
≤ V
CC
CC
CC
,
– 0.2V,
Test
Condition
V
= 0V
IN
V
= 0V
OUT
Min Max Unit
6pF
8pF
55 7.5 20 mA
70 6.0 15 mA
2mA
–1 1 µA
–1 1 µA
2.5 15 µA
V
V
V
V
Note: 1. Average AC current , c ycling at t
Input High Voltage 2.2
IH
Input Low Voltage –0.3 0.8 V
IL
Output High Voltage
OH
Output Low Voltage
OL
= VIL, E2 = VIH, VIN = VIH or VIL.
2. E1
≤ 0.2V or E2 ≥ VCC –0.2V, VIN ≤ 0.2V or VIN ≥ VCC –0.2V.
3. E1
4. Outpu t disabled.
AVAV
minimum.
I
= –1mA
OH
I
= 2.1mA
OL
V
+ 0.3
CC
2.4 V
0.4 V
V
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