– Active Current 30mA at 5MHz
– Standby Current 100µA
■ PROGRAMMING VOLTAGE: 12.75V ± 0.25V
■ PROGRAMMING TIME: 100µs/byte (typical)
■ ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: 41h
DESCRIPTION
The M27C4001 is a 4 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for microprocessor systems requiring large programs and
is organised as 524,288 by 8 bits.
The FDIP32W (window ceramic frit-seal package)
and LCCC32W (leadless chip carrier package)
have a transparent lid which allow the user to expose thechipto ultraviolet light to erase the bit pattern. A new pattern can then be written to the
device by following the programming procedure.
For applications wherethe contentis programmed
only one time and erasure is not required, the
M27C4001 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20mm) packages.
Table 1. Signal Names
M27C4001
32
1
FDIP32W (F)
LCCC32W (L)
PLCC32 (C)
Figure 1. Logic Diagram
V
19
A0-A18Q0-Q7
CC
32
V
PP
1
PDIP32 (B)
TSOP32 (N)
8 x 20 mm
8
A0-A18Address Inputs
Q0-Q7Data Outputs
EChip Enable
GOutput Enable
V
PP
V
CC
V
SS
Program Supply
Supply Voltage
Ground
E
G
M27C4001
V
SS
AI00721B
1/16July 1998
M27C4001
Figure 2A. DIP Pin Connections
V
PP
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q2
SS
1
2
3
4
5
6
7
8
M27C4001
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
AI00722
V
CC
A18A16
A17
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5Q1
Q4
Q3V
Figure 2B. LCC Pin Connections
CC
VPPV
32
Q3
Q4
A18
Q5
A7
A6
A5
A4
A3
A2
A1
A0
Q0
9
A12
A15
M27C4001
Q1
Q2
A16
1
17
SS
V
A17
25
Q6
A14
A13
A8
A9
A11
G
A10
E
Q7
AI00723
Figure 2C. TSOP Pin Connections
A11G
A9
A8
A13
A14
A17
A18
V
CC
V
PP
A16
A15
A12
A7
A6
A5
A4A3
1
M27C4001
8
(Normal)
9
1617
32
25
24
AI01155B
A10
E
Q7
Q6
Q5
Q4
Q3
V
SS
Q2
Q1
Q0
A0
A1
A2
DEVICE OPERATION
The operating modes of the M27C4001 are listed
in the Operating Modes table. A single power supply is required in the read mode. All inputs are TTL
levels exceptfor VPPand 12V on A9 for Electronic
Signature.
Read Mode
The M27C4001 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable(G) is the output controland should
be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time
(t
) is equal to the delay from E to output
AVQV
(t
). Datais available at the output after a delay
ELQV
of t
from the falling edge of G, assuming that
GLQV
E has been low and the addresses have been stable for at least t
AVQV-tGLQV
.
Standby Mode
The M27C4001 hasa standby mode which reduces the supply current from 30mA to 100µA. The
M27C4001 is placed in the standby mode by applying a CMOS high signal to the E input.When in
the standby mode, theoutputs are in a high impedance state, independent of the G input.
2/16
M27C4001
Table 2. Absolute Maximum Ratings
(1)
SymbolParameterValueUnit
T
A
T
BIAS
T
STG
(2)
V
IO
V
CC
(2)
V
A9
V
PP
Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listedin the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure toAbsolute Maximum Rating conditions for extended periods may affect device reliability. Referalso to the STMicroelectronics SURE Program andother relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
3. Depends on range.
Table 3. Operating Modes
Ambient Operating Temperature
Temperature Under Bias–50 to 125°C
Storage Temperature–65 to 150°C
Input or Output Voltage (except A9)–2 to 7V
Supply Voltage–2 to 7V
A9 Voltage–2 to 13.5V
Program Supply Voltage–2 to 14V
+0.5V with possible overshoot to VCC+2V for a period less than 20ns.
CC
(1)
ModeEGA9
Read
Output DisableV
Program
VerifyV
Program Inhibit
Standby
Electronic Signature
Note: 1. X = VIHor VIL,VID= 12V ± 0.5V.
V
IL
IL
V
PulseV
IL
IH
V
IH
V
IH
V
IL
(3)
V
IL
V
IH
IH
V
IL
V
IH
X
XV
X
XVPPData Out
X
XX
V
IL
V
ID
–40 to 125°C
V
pp
V
or V
CC
SS
or V
CC
SS
V
PP
V
PP
V
or V
CC
SS
V
CC
Q0 - Q7
Data Out
Hi-Z
Data In
Hi-Z
Hi-Z
Codes
Table 4. Electronic Signature
IdentifierA0Q7Q6Q5Q4Q3Q2Q1Q0Hex Data
Manufacturer’s Code
Electronic Signature
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
V
IL
V
IH
00100000 20h
01000001 41h
For the most efficient use of these two control
lines, E should be decodedand used asthe primary device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselected memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
3/16
M27C4001
Table 5. AC Measurement Conditions
High SpeedStandard
Input Rise and Fall Times≤ 10ns≤ 20ns
Input Pulse Voltages0 to 3V0.4 to 2.4V
Input and Output Timing Ref. Voltages1.5V0.8 and 2V
Figure 3. Testing Input Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table 6. Capacitance
SymbolParameterTest ConditionMinMaxUnit
C
IN
C
OUT
Note: 1. Sampled only, not 100% tested.
(1)
(TA=25°C, f = 1 MHz)
Input Capacitance
Output CapacitanceV
2.0V
0.8V
AI01822
Figure 4. AC Testing Load Circuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
C
L
CL= 30pF for High Speed
CL= 100pF for Standard
CLincludes JIG capacitance
V
=0V
IN
=0V12pF
OUT
6pF
OUT
AI01823B
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs requirecareful decoupling of the
devices. The supply current, ICC, has three segments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edgesof E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output.
The associated transient voltage peaks can be
suppressed by complying with the two line output
4/16
control and by properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic
capacitor be used on every device between V
CC
and VSS. This should be a high frequency capacitor of low inherent inductance and should be
placed as close to the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be
used between VCCand VSSfor every eight devices. The bulkcapacitor should be located near the
power supply connection point. Thepurposeof the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
M27C4001
Table 7. Read Mode DC Characteristics
(1)
(TA= 0 to 70 °C or –40 to 85 °C; VCC=5V±5% or 5V ± 10%; VPP=VCC)
SymbolParameterTest ConditionMinMaxUnit
I
I
LO
I
CC
I
CC1
I
CC2
I
PP
V
V
IH
V
Input Leakage Current
LI
Output Leakage Current
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOSE > VCC– 0.2V100µA
Program Current
Input Low Voltage–0.30.8V
IL
(2)
Input High Voltage2VCC+1V
Output Low VoltageIOL= 2.1mA0.4V
OL
Output High Voltage TTL
V
OH
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
2. Maximum DC voltage on Output is V
Output High Voltage CMOSI
+0.5V.
CC
0V ≤ V
0V ≤ V
OUT
E=V
IL
= 0mA, f = 5MHz
I
OUT
E=V
V
PP=VCC
I
= –400µA
OH
= –100µAV
OH
≤ V
IN
CC
≤ V
CC
,G=VIL,
IH
±10µA
±10µA
30mA
1mA
10µA
2.4V
– 0.7V
CC
Table 8A. Read Mode AC Characteristics
(1)
(TA= 0 to 70 °C or –40 to 85 °C; VCC=5V±5% or 5V ± 10%; VPP=VCC)
M24C4001
SymbolAltParameterTest Condition
Address Valid to
(2)
(2)
t
ACC
Output Valid
Chip Enable Low to
t
CE
Output Valid
Output Enable Low to
t
OE
Output Valid
Chip Enable High to
t
DF
Output Hi-Z
Output Enable High to
t
DF
Output Hi-Z
Address Transition to
t
OH
Output Transition
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after V
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
E=V
E=V
,G=V
IL
G=V
E=V
G=V
E=V
,G=V
IL
IL
IL
IL
IL
IL
IL
-35
(3)
-45
MinMaxMinMaxMinMax
354555ns
354555ns
202530ns
030030030ns
030030030ns
000ns
PP
(3)
-55
(3)
Unit
5/16
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