SGS Thomson Microelectronics M27C322 Datasheet

32 Mbit (2Mb x16) UV EPROM and OTP EPROM

■ 5V ± 10% SUPPLY VOLTAGE in READ

OPERATION

■ ACCESS TIME: 80ns

■ WORD-WIDE CONFIGURABLE

■ 32 Mbit MASK ROM REPLACEMENT

■ LOW POWER CONSUMPTION

– Active Current 50mA at 5MHz
– Stand-by Current 100µA

■ PROGRAMMING VOLTAGE: 12V ± 0.25V

■ PROGRAMMING TIME: 50µs/word

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 0020h
– Device Code: 0034h

DESCRIPTION

The M27C322 is a 32 Mbit EPROM of fe red i n the
UV range (ultra violet erase). It is ideally suited for
microprocessor systems requiring large data or
program storage. It is organised as 2 MWords of
16 bit. The pin-out is compatible with a 32 Mbit
Mask ROM.

The FDIP42W (window ceramic frit-seal package)
has a transparent lid which all ows the user to ex­pose the chip to ultraviolet light to erase the bit pat­tern. A new pattern can then be written rapidly to
the device by following the programming proce­dure.

For applications where the content is programmed
only one time and erasure is not required, the
M27C322 is offered in PDIP42 package.

42

1

FDIP42W (F) PDIP42 (P)

42

Figure 1. Logic Diagram

V

CC

21

A0-A20

GV

E

PP

M27C322

M27C322

1

16

Q0-Q15

V

SS

AI02156

1/13April 2000

M27C322

Figure 2A. DIP Connections

A18 A19

GV

A7
A6
A5
A4
A3
A2
A1
A0

V

SS
PP

Q0
Q8
Q1
Q9

Q10

Q3

Q11

1
2
3
4
5
6
7
8
9
10

M27C322

11

E

12
13
14
15
16
17
18
19
20
21

42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22

AI02157

A8A17
A9
A10
A11
A12
A13
A14
A15
A16
A20
V

SS

Q15
Q7
Q14
Q6
Q13
Q5Q2
Q12
Q4
V

CC

DEVICE OPERATION

The operating modes of the M27C322 are listed in
the Operating Modes Table. A single power supply
is required in the read mode. All inputs are TTL
compatib le exce pt for V

and 12V on A9 for the

PP

Electronic Signature.

Read Mode

The M27C322 has a word-wide organization. Chip
Enable (E
used for device selection. Output Enable (G

) is the power control and should be

) is the
output control and should be used to gate data to
the output pins in dependent of device selection.
Assuming that the addresses are s table, the ad­dress access time (t

) is equal to the delay

AVQV

Table 1. Signal Names

A0-A20 Address Inputs
Q0-Q15 Data Outputs
E

V

G

PP

V

CC

V

SS

from E to output (t
output after a delay of t

VPP, assuming that E has been low an d the

of G
addresses have been stable for at least t
t

.

GLQV

Chip Enable
Output Enable / Program Supply
Supply Voltage
Ground

). Data is available at the

ELQV

from the falling e dge

GLQV

AVQV

Standby Mode

The M27C322 has a standby mode which reduces

the supply current from 50mA to 100µA. The
M27C322 is placed in the standby mode by apply­ing a CMOS high signal to the E

input.When in the
standby mode, the outputs are in a high imped­ance state, independent of the G

VPP input.

Two Line Outp ut C ontrol

Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con­trol function which accommodates the use of mul­tiple memory connection. The two line control
function allows:

a. the lowest possible memory power dissipation,
b. complete assurance that output bus content ion

will not occur.

For the most efficient use of these two control
lines, E
ry device selecting function, while G

should be decoded and used as the prima-

VPP should be
made a common connectio n to all devices in the
array and connected to the READ

line from the
system control bus. This ensures that all deselect­ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.

-

2/13

M27C322

Table 2. Absolute Maximum Ratings

(1)

Symbol Parameter Value Unit

T

A

T

BIAS

T

STG

(2)

V

IO

V

CC

(2)

V

A9

V

PP

Note: 1. Except for the ratin g " Operating Temperat ure Range" , stresses above th ose listed i n t he Table "Absolute Maximum Ratings" may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indi cated in t he Opera t in g sections of thi s specifi cation i s not imp l i ed. Exposure to Absolute M aximum Rating condi­tions for extended per iods may aff ect device reliabilit y. Refer also to the STMicroel ectronics SURE Program an d other relevan t qual ­ity docum en ts .

2. Minimum DC vo ltage on Input o r Outpu t is – 0.5V w ith poss ible un dershoot to –2. 0V fo r a peri od les s than 20ns. Ma ximum DC

voltage on Output is V

3. Depends on range.

Ambient Operating Temperature

Temperature Under Bias –50 to 125 °C
Storage Temperature –65 to 150 °C

Input or Output Voltage (except A9) –2 to 7 V
Supply Voltage –2 to 7 V
A9 Voltage –2 to 13.5 V
Program Supply Voltage –2 to 14 V

+0.5V with possible overshoot to VCC +2V for a period l ess than 20n s.

CC

(3)

–40 to 125 °C

Table 3. Operating Modes

Mode E

Read
Output Disable
Program
Program Inhibit
Standby
Electronic Signature

Note: X = VIH or VIL, VID = 12V ± 0.5V.

V

IL

V

IL

V

Pulse V

IL

V

IH

V

IH

V

IL

GV

V

PP

V

IL

V

IH

PP

PP

A9 Q15-Q0

X Data Out
X Hi-Z
X Data In
X Hi-Z

X X Hi-Z

V

IL

V

ID

Codes

Table 4. Electronic Signature

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data

Manufacturer’s Code
Device Code

Note: Outputs Q15-Q8 are set to '0' .

V
V

IL

IH

00100000 20h
00110100 34h

3/13

M27C322

Table 5. AC Measurement Conditions

High Speed Standard

Input Rise and Fall Times ≤ 10ns ≤ 20ns
Input Pulse Voltages 0 to 3V 0.4V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V

Figure 3. AC Testing Input Output Waveform

High Speed

3V

1.5V

0V

Standard

2.4V

0.4V

Table 6. Capacitance

Symbol Parameter Test Condition Min Max Unit

C

IN

C

OUT

Note: 1. Sampled only, not 100% tested.

(1)

(TA = 25 °C, f = 1 MHz)

Input Capacitance
Output Capacitance

2.0V

0.8V

AI01822

Figure 4. AC Testing Load Circuit

1.3V

DEVICE
UNDER

TEST

CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance

V

= 0V

IN

V

= 0V

OUT

1N914

3.3kΩ

CL

10 pF
12 pF

OUT

AI01823B

System Considerations

The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current ICC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produc ed by the
falling and rising edges of E

. The magnitude of the
transient current peaks is dependent on the ca­pacitive and inductive loadi ng of the device out­puts. The associated transient voltage peaks can
be suppressed by complying with the two line out-

4/13

put control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram­ic capacitor is used on every device between V

CC

and VSS. This should be a high frequency type of
low inherent inductance and should be placed as
close as possible to the device. In addition, a

4.7µF electrolytic capacitor should be used be­tween V

and VSS for every eight devices. This

CC

capacitor should be mounted near the power sup­ply connection point. The purpose of this capacitor
is to overcome the voltage d r op caus ed by the in­ductive effects of PC B traces.