This is preliminary information on a new product now in development. Details are subjectto change without notice.
1/10
L6270 - L6271
PIN CONNECTION(SO20)
H-BRIDGE
GND-P
COIL
OUT1-A
OUTK-A
SLEEP
INA(inv)
INA(not inv)
GND-ADC2ref
VrefIref
2
3
4
5
6
7
8
9
10
D98IN968
20
19
18
17
16
15
14
13
12
11
PIN FUNCTIONS(SO20)
N.NameDescription
1H-BRIDGE40V Half Bridge output for negative charge pump.
2GND-PPower ground.
3COILCoil for positive step up.
4OUT1-AOutput ampl.A.
5OUTK-AHi current output ampl.A.
6SLEEPSleep mode for stand-by condition(1=SLEEP 0=operative).
7INA (inv)Inverting input of A-amplifier.
8INA (not inv)Non Inverting input of A-amplifier.
9GND-AAnalog ground.
10V
11I
12DC2refReference voltage for DC-DC converter X20.
13INB (not inv)Non Invertinginput of B-amplifier.
14INB (inv)Inverting input of B-amplifier.
15OUTK-BHi current output ampl.B.
16OUT1-BOutput ampl.B.
17V512-APAnalog&Power voltage supply 5 to 12V.
18RC compDC-DC converter compensation network.
19HVMNegative High voltage generated op amp supplier.
20HVPPositive High voltage generated op amp supplier.
ref
ref
Precise 2.5V reference voltage.
External resistor for precise internal current reference.
1H-BRIDGE40V Half Bridge output for negative charge pump.
2GND-PPower ground.
3COILCoil for positive step up.
4N.C.
5OUT1-AOutput ampl.A.
6OUTK-AHi current output ampl.A.
7SLEEPSleep mode for stand-by condition (1=SLEEP 0=operative).
8INA (inv)Inverting input of A-amplifier.
9INA (not inv)Non Inverting input of A-amplifier.
10V-SHIFTEDAnalog level shifter output Vin-Vref (-2.5 to +2.5 dynamic range)
11Vin 0-5Input positive voltage
12GND-AAnalog ground.
13V
14I
ref
ref
15DC2refReference voltage for DC-DC converter X20.
16INB (not inv)Non Inverting input of B-amplifier.
17INB (inv)Inverting input of B-amplifier.
18OUTK-BHi current output ampl.B.
19OUT1-BOutput ampl.B.
20V512-APAnalog&Power voltage supply 5 to 12V.
21LIN/BANGLinear or Bang-bang select pin (V512 = BANG 0 = Linear)
22RC compDC-DC converter compensation network.
23HVMNegative High voltage generated op amp supplier.
24HVPPositive High voltage generated op amp supplier.
Precise 2.5V reference voltage.
External resistor for precise internal current reference.
3/10
L6270 - L6271
ABSOLUTEMAXIMUM RATINGS
SymbolParameterValueUnit
V512Supply voltage pin 20 referredto Ground14V
HVPPositive high voltage referred to HVM84V
HVMNegative high voltage referred to Ground-42V
IN A&BAmplifier input voltage common mode±6V
o to 5Level shifts input voltage-0.5 to +5.5V
Vi
n
T
amb
T
stg
All the voltagevalue are referred to ground.
Operative Ambient Temperature-20 to +80°C
Storage Temperature-40to +125°C
ELECTRICAL CHARACTERISTICS
(All the following parameters are specified @ 27°C and V512 =
12V, unless otherwisespecified.)
SymbolParameterTest ConditionMin.Typ.Max.Unit
V
512
HVP
HVMOutput negative voltage-40-25V
HVrippleHVP,HVM rippleExternal filter cap. 100nF
DC-DC gain Ratio of HVP and DC-DC ref.
I, hvpOutput current (see figure 1a)
I, hvm
T
op
F
switch
R
ds,on
I
boost
CP-slopeCharge Pump Slope150V/µs
I
sleep
V
ref
I
vref
V
ref, cap
I
ref, res
V
sup
DC gainOpAmp DC gain130dB
GBWOpAmp Gain Bandwidth
DCinpOpAmp Input dynamic voltageDouble supply-55V
DC-DC
OFF
Main power supply4.513.2V
(1)
Output positive VoltageDouble Supply Voltage2540V
Single Supply Voltage V
Single Supply Voltage V
512
512
≥ 8
≤ 8
30
25
Bang-BangMode
Linear Mode
192021
voltage PIN15
Time to operating condition5ms
(2)
Switching Frequency80550kHz
Boost transistor ON resistance4
Boost transistor current limiting700mA
Total current in sleep mode1mA
Reference voltage at PIN132.42.52.6V
Reference voltage output
-11mA
current
Filter capacitor at PIN1310100nF
Resistor at PIN14 for precise
25k
internal current (100µA)
Minimum OpAmp supply
Voltage (HVP if externally
given)
Double SupplyV512
+4
Single SupplyV512
+4
product
Cload 0.4nF to 24nF
Double Supply Voltage
500KHz
Single supply1.210V
DC-DC Converter switched-off
when DC
2
REF voltage lower
than
80
40
2.5
0.8
0.6V
V
V
V
V
Ω
Ω
V
V
4/10
L6270 - L6271
ELECTRICALCHARACTERISTICS
(continued)
SymbolParameterTest ConditionMin.Typ.Max.Unit
V
DC, I
out
OpAmp Output dynamic voltageCapacitive loadHVMHVPV
OpAmp Bias supply current
bias
7mA
(both)
I
out
PSRR,POpAmp Positive power supply
OpAmp Dynamic Output current-7575mA
@ 50kHzTBDdB
rejection ratio
PSRR,NOpAmp Negative power supply
@ 50kHzTBDdB
rejection ratio
C
load
OpAmp Load capacitance
Voltage mode Gain min 20dB0.424nF
range
C
int
KOpAmp Current ratio
OpAmp Integration capacitanceCharge mode Gain min 20dB0.424nF
9.81010.2
OUTK/OUT1
(3)
DC
I
err
V
offset
Shift range
OpAmp IoutkIout1 = 0-1050µA
OpAmp Input offset voltage
Dynamic Shifter
14V
10mV
±
Input Range
Note 1: Selectableby externalresistor.
Note 2: Setby external Coil and Capacitor.
Note 3: Itwill be write after silicon characterization, it’s designed for a maximum offset of a few mA.
Incharge mode the Piezo isin openloop, andif Cpiezo= 0.4nF witha maximum Current error of ±5µA the Maximum long time voltage
driftis ±12mV/µs
Figure 1a. HVP load regulation in single supply
mode”.
V
S
(V)
38
36
34
32
30
28
26
24
22
00.0040.008 0.012 0.016 IL(A)
Supply=8V
Supply=5V
D99IN1003
5/10
L6270 - L6271
Figure 1. Charge Mode Configuration (only a suggestion,the applicationis completelyfree
accordingwith ElectricalCharacteristics).
Qpiezo=K*[Cint*(1+Ra/Rb)+C]*Vdac
Qpiezo=Cost*Vdac
HVP
1
Cost=k*[Cint*(1+Ra/Rb)+C]
K
Rb
C
+
-
HVM
Ra
1
Vdac
OPERATIONALAMPLIFIERS DESCRIPTION
Each driver has two output stages scaled in current by a factorK = 10.
In voltage mode configuration the two outputsare
shorted.
In charge mode configuration OUT1 drives a capacitor Cint and is closed in feedback, while
OUTK drives the piezo, mirroring the current supplied to Cint, with a current multiplied by a K factor (see Fig.1).
The supply voltage can be internally generatedby
the DC-DCconverter,or external, maintainingthe
DC-DC converter in sleep mode (PIN15 shorted
to ground), in this case the supply voltage can be
0 to V512+4 minimum value up to 80V in single
supply or V512+4 to 40V symmetricalto ground.
The drivers have 130dB DC gain and the Bandwidth is 500KHz. Stability is granted with a minimum gain of 20dB, for a capacitive load in the
range 0.4nF up to 24nF.
The driverscan be supplied with HVP-HVM (double supply mode) or with HVP-Ground (single
supply mode). In both cases they can achieve a
rail-to rail output dynamic range with a maximum
load currentof ±75mA.
In double supply mode the input stage has 5V/+5V dynamic range, while in single supply
modeit has1.2V up to 10V input dynamicrange.
A 2.5V internal reference voltage is available at
one pin (Vref) thatcan be used to close the feedback if the input signal is symmetrical around
2.5V.
In this case the output dynamic is symmetrical
around 2.5V. It is present a 2.5V down level
shifter that can be connected between the input
signal and the input of the opamp, to work inter-
Cpiezo
K
Cint
D98IN970A
R
P
nally with a signal symmetricalto ground.
DC-DC CONVERTER DESCRIPTION
The DC-DC converterinside the chip can be supplied from 5V up to 12V andhas two parts, one to
supplythe positiveand one to supply thenegative
voltage.
The positiveone takes the reference from the pin
2
REF and multiplies it by 20 to have the output
DC
voltage.
2
If DC
REF is lessthan 0.6Vthe whole DC-DC converter is shut down and the high voltages have to
be supplied from external. In Sleep Mode (sleep
pin) HVM is shorted to GND. When in singlesupply,no loadhas to be connectedto H-bridge output
andHVM mustbe connectedto GND.
The topology is a standard resonant full-wave
boost one: the LC oscillation is kept running all
the time and a set of comparatorsis used to synchronize turning on and off of the power MOS in
order to have zero current and zero voltage
switchingand furthermorecontrolledrectification.
The step-up converter is designed to work in
”Bang-Bang” mode and in Linear mode, in this
case an AC compensation network is required
(RC-comp)to guaranteethe stabilityin a wide operative range (i.e. changing coil, load, output and
input voltage...).
Bang-Bangmode
In
(Bang/Lin=V512high condition) whenever the output HVP goes down fixed
threshold(Vt
=20⋅DC2REF),the next oscilla-
h,out
tion phase is more powerful and is used to transfer energy from the powersupply to the output.
Linear mode
In
, according to the ouput voltage,
the current loaded into the coil is changing like a
6/10
L6270 - L6271
Voltage Loop-Current Controlled system, and in
every pulse there is a regulated power transfer to
the load.
The resonantLC topology has been chosenin order to limit the voltage slew-rate across the coil
within reasonable values and so, to minimize irradiation problems.
The negative converter is a simple charge transfer: it is supplied by the positive high voltage and
it capacitively translates this positive voltage
Figure 3. DC-DC converter
HVP
BACK-UP
V512
OSCILL.
+
-
200µA
L
DC-DC
LOGIC
B
:5
L
2.5V
down to a negative one, obviously to limit irradiation problems also the chargeoutput has a limited
slew-rate; moreover to reduce intermodulation
phoenomenasthe charge output is synchronized
with the LC oscillationsof the resonant boost.
This negative voltage is (not counting drops on
external rectification diodes) in tracking with the
positive one and so the negativeoutput controller
is notrequired.
V512
V512
+
-
+
-
+
-
R
S
HVP
+40V
HVM
-40V
D98IN971A
7/10
L6270 - L6271
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
A2.352.650.0930.104
A10.10.30.0040.012
B0.330.510.0130.020
C0.230.320.009
D12.6130.4960.512
E7.47.60.2910.299
e1.270.050
H1010.65 0.3940.419
h0.250.750.0100.030
L0.41.270.0160.050
K0°(min.)8°(max.)
mminch
0.013
OUTLINE AND
MECHANICAL DATA
SO20
8/10
B
e
D
1120
110
L
hx45°
A
K
A1
C
H
E
SO20MEC
L6270 - L6271
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
A2.352.650.0930.104
A10.100.300.0040.012
A22.550.100
B0.330.510.0130.0200
C0.230.320.009
D15.2015.600.5980.614
E7.407.600.2910.299
e1.270,050
H10.010.65 0.3940.419
h0.250.750.0100.030
k0°(min.),8° (max.)
L0.401.270.0160.050
mminch
0.013
OUTLINE AND
MECHANICAL DATA
SO24
0.10mm
.004
Seating Plane
1
A2
A
Be
A1
K
D
1324
E
12
hx45°
L
A1C
H
SO24
9/10
L6270 - L6271
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OFCOMPANIES
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