SGS Thomson Microelectronics L6245 Datasheet

L6245
5V HARD DISK DRIVE POWER COMBO
PRODUCT PREVIEW
General
+5V OPERATION REGISTERBASEDARCHITECTURE MINIMUMEXTERNALCOMPONENTS SLEEP AND IDLE MODES FOR LOW
SPINDLEGm LOOP LINEAR CURRENT CONTROL LOOPS FOR
BOTH VCM AND SPINDLE 8 BIT D/A FOR ACTUATOR DRIVER AND
SPINDLEDRIVER
VCM Driver
CURRENT SENSE CONTROL (VOLTAGE PROPORTIONALTO CURRENT)
VOLTAGE SENSE CONTROL (VOLTAGE PROPORTIONAL TO THE VOLTAGE ACROSSTHE VCM)
TWO CURRENT RANGES FOR SEEKING ANDTRACKING
INTERNAL REGISTER FOR POWER AMP CONTROLLINES
SPEED OUTPUT (VOLTAGE PROPOR­TIONALTO BEMF)
Spindle Driver
BEMF PROCESSING FOR SENSORLESS MOTORCOMMUTATION
PROGRAMMABLE COMMUTATION PHASE DELAY
PROGRAMMABLE SLEW-RATE FOR RE­DUCEDEMI
0.7TYP. FOR ANY HALF BRIDGE CROSS CONDUCTION PROTECTION SYNTHESIZEDHALL OUTPUT
OtherFunctions
POWER UP SEQUENCING POWER DOWN SEQUENCING LOW VOLTAGE SENSE ACTUATOR RETRACTION DYNAMICBRAKE THERMAL SHUTDOWN
MULTIPOWERBCD TECHNOLOGY
PQFP64
ORDERING NUMBER: L6245
DESCRIPTION
The L6245 contains in a single chip all the func­tions to operate a sensorlessbrushless (DC) mo­tor and a voice coil motor, suitable for hard disk drive applications. The device is configured to interface directly to an 8 bit parallel microprocessor bus, and has a register based architecture to reduce number of interconnection lines. All the positioning loop for sensorless spindle is integrated, including BEMF sensing, digital masking, digital delay and se­quencing. All timing function are performed digi­tally, thus no external filtering componentsare re­quired. The VCM driver is a transconductanceamplifier, able to provide2 differentcurrentranges, suitable for seeking or tracking of the head actuator. When a low voltage is detected, a monitor, in se­quence, resets the internal registers, puts in tris­tate the spindle powers, retractsthe actuator, and appliesthe dynamic brake ofthe spindle. The L6245 is realized in Multipower-BCD 2 tech­nology, which combine isolate DMOS power tran­sistors with CMOS and Bipolar circuits in the same monolithic layer, and is assembled in a 64­pin PQFP.
October 1992
This is advanced information on a new product now indevelopment or undergoing evaluation. Details are subject to change without notice.
1/15
L6245
BLOCK DIAGRAM
2/15
PIN CONNECTION (Top view)
L6245
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
ds sus
; Vcc Supply Voltage Power (VP)
V
P
V
V
I I
P
T
stg,Tj
Peak Output SustainingVoltage 14 V
8
Logic(V
Logic input Voltage 0 to 6 V
i
Charge Pump Input Voltage 18 V
cp
Sink-Source Peak Output Current 1.5 A
p
Sink-Source DC OutputCurrent 1 A
O
Total Power Dissipation (T
tot
=60°C) 1 W
amb
CC
)
6
Storage and Junction Temperature –40 to 150 °C
THERMAL DATA
Symbol Parameter Value Unit
R
thj-amb
(*) Mounted on a typical PCB layout (see Fig. 7)
Thermal Resistance Junction-ambient (*) max. 90 °C/W
V V
3/15
L6245
PIN DESCRIPTION [Pin Types:I =Input, O =Output, P =Power, A= Analog (passive)] Power
Pin Number Pin Name Pin Type Description
12, 17
24,
3
7, 42, 64 GND P Ground.
10 V 59 POR 0 POWER ON RESET - Goes lowwhen the supplyvoltage is below the
61 POR_DLY A POR DELAY. An external parallel RC networkfrom thispin to ground
62 POR_FILT A An external capacitor from this pinto ground provides filtering for the
5 CPC A Charge pump capacitor 6 CPL A Charge pump inductor
VPOWER
VDIG
V
CC
REF
MicroprocessorInterface
Pin Number Pin Name Pin Type Description
25 26 27 28 29 30 31 32
38 RD I READ A low level on thispin allows the busto be driven by the IC. 39 WR I A low level on WRITE allows the ICto read data from thesystem bus. 35 MC_CS I CHIP SELECT A low level on this pin selects the IC for bus
41 SYSCLK I Microprocessor clock used forinternal timing. 33
34 35
37 AS I ADDRESS STROBE The address appearing on A [0:2] is latchedon
43 MC_ERR O A maskable interrupt signal which isasserted low when anerror flag in
40 DTACK O An open drain, activelow signal used for asynchronousbus
D7 D6 D5 D4 D3 D2 D1 D0
A0 A1 A2
P Positive supply, nominally 5V.
I All analog signals are referenced to thisvoltage, nominally 2V.
VOLTAGE GOOD threshold.POR is anopen collector output with an internal 20kpull-up.
sets the time thePOR signal staysactive after voltage good.
V
sense inputof the POR circuit.
CC
I/O I/O I/O I/O I/O I/O I/O I/O
I I I
An 8-bit bidirectional databus which is connected to the internal registers.
transactions.
The lowest three bits of thesystem addressbus; used to address internal registers
the falling edge of the AS pulse.
the Status Registeris set. The output is open-drain with an internal 20Kpull-up.
transactions.
Brushless,SensorlessMotor Driver and 8 bit D/A
Pin Number Pin Name Pin Type Description
47 SPIN_DAC O The output ofan 8 bit D/A used for the command to thespindle driver. 48 SPIN_CMD I The input to the spindledriver transconductance amplifier. 45 COIL_CT I The center tap of the motor is connected to this pin.
O The motor coilsare drivenby these outputs. Back EMF isalso sensed
at these pins.
4/15
53 57 60
COIL_U COIL_V
COIL_W
PIN DESCRIPTION (continued)
Pin Number Pin Name Pin Type Description
44 SYNTH_HALL O A TTL compatible signal thatemulates one ofthe Hall signals.
SYNTH_HALL is an opendrain output with an internal20Kpull-up.
49, 50,
58
SPIN SENSE
1,2,3
A The current sensing resistors is connectedfrom these pinsto ground.
46 PWM_OFFT A A parallelR-C from thispin to ground sets the PWM mode OFF time. 56 SLEW A A resistor from thispin to ground setsthe slew rate of the driver. 51 S_COMP A An R-C network from this pin to GND setsthe spin driver
compensation.
VCM Driver and8 bit D/A
Pin Number Pin Name Pin Type Description
8 VCM_DAC O The output of an 8 bit D/A usedto command the VCM driver.
9 VCM_CMD I VCM driver input command which is relativeto V 21 VCM_COMP A An R-C network from this pin to ground compensates theVCM driver. 14 VCM_RS1 A The highgain current sense resistor is attached from this pin to ground. 23 VCM_RS2 A The low gain current sense resistor isconnected from this pin to
VCM_RS1 13 VCM+ O One end ofthe load is attached to this pin (Positive). 15 VCM- O The other end of the load is attached to this pin (Negative). 20 OV_VOLT O A voltagewhich is proportional to the voltage across the load,
referenced to V
REF
.
19 OV_CUR O A voltagewhich is proportional to the current through the load,
referenced to V
REF
. 16 OV_SUM– I Over-velocity summing op-amp inverting input. 18 OV_SUM_OUT O Over-velocity summing op-amp output.
REF
.
L6245
22 ISENSE O A voltagewhich is proportional to the current through the VCM load as
sensed by thesense resistor. This signal isenabled bysetting bit 2 in the VCM ControlRegister.
54 VCM_STRB I The 8 bitinput to the VCM D/A is updated on therising edge of
VCM_STRB.
SolenoidPre-drivers and Power Down Sequencing
Pin Number Pin Name Pin Type Description
11,55,
63
2 LOAD_SOL O When a logic one is writtento bit 3 ofthe VCM Control Register,
1 UNLOAD_SOL O When alogic one is writtento bit 4 of the VCM Control Register,
4 PD_SEQ_CAP A When power is removed, the chargestored on thiscapacitor keeps
52 BRK_DLY A An external parallel RC network from thispoint toground delays
V_RECIR P Under normal conditions, power is supplied to variousblocks via the
V_RECIR pin. When externalpower is removed, energy stored in the rotating spindle is converted toa voltage which suppliesthe park circuit.
current is sourced from the LOAD_SOL pin. Otherwise, the pin is high impedance.
current is sourced from the UNLOAD_SOL pin. Otherwise, the pin is high impedance.
selected blocks alive long enough toeffect an orderlypower down.
activation of the dynamic brake after power is removed.
5/15
Loading...
+ 10 hidden pages