SGS Thomson Microelectronics L6238 Datasheet
SENSORLESSSPINDLE MOTOR CONTROLLER
2.5A,THREE-PHASE OUTPUT DRIVE
PRECISIONDIGITALPLL
FULLY-INTEGRATEDALIGN+ GO
START-UP ALGORITHM
DIGITALBEMF PROCESSING
MASTER/SLAVE SYNCHRONIZATION
BIDIRECTIONALSERIAL PORT
STAND ALONEOR EXT. DRIVER
SHOOT-THROUGH PROTECTION
L6238
PRODUCT PREVIEW
PLCC44
ORDERING NUMBER: L6238
DESCRIPTION
The L6238 is a complete Three-Phase, D.C.
Brushless Spindle Motor Driver system. The device features both the Power and Control Sections and will operate Stand Alone, or can be
used in Higher Power Applications with the addition of an external Linear Driver.
Start-Up can be achieved with the Fully-Integrated Align + GO Algorithm or may be sequenced manually for User-Definedstart-up algo-
BLOCK DIAGRAM
rithms.
A Digital PLL provides high accuracy and the ca-
pability to do Master/Slave Synchronization for
Disk Array configurations.
Programmable functions include commutation
Timing Adjustment and Slew Rate Control for
peakefficiencyand minimum noise.
Protective features include Stuck Rotor\Backward
Rotation Detection and Automatic Thermal Shutdown.
June 1993
This is advanced information on anew product now in development orundergoing evaluation. Details are subject to change without notice.
1/35
L6238
ABSOLUTE MAXIMUMRATINGS
Symbol Parameter Value Unit
BV
dss
V
Power
V
Logic
V
Analog
V
in
I
mdc
I
mpk
P
tot
Ts Storage and Junction Temperature -40 to 150 °C
PIN CONNECTION (Top view)
Output Brakdown Voltage 17 V
MotorSupply Voltage 15 V
LogicSupply Voltage 7 V
Analog Supply Voltage 15 V
InputVoltage -0.3 to 7 V
Peak Motor Current (DC) 3 A
Peak Motor Current (Pulsed: Ton= 5ms, d.c. = 10%) 5 A
Power Dissipation at Tamb = 50°C 2.5 W
THERMAL DATA
Symbol Parameter Value Unit
Thermal Resistance Junction-Pin 7 °C/W
Thermal Resistance Junction-Ambient (Float.) 68 °C/W
Thermal Resistance 34 °C/W
2/35
R
th (j-pin)
R
th (j-amb)
R
th (j-amb)
L6238
GENERALDESCRIPTION
The L6238 is an integrated circuit that will be
used to commutate and speed control a 3-Phase,
8-pole, brushless, DC motor. The primary application is for disk drive spindle motors. This I.C. has
the following features:
No Motor Hall Effect Sensors are required for
commutationor speed control. Timing information is determined from the Bemf voltage of the
undrivenmotor terminal.
On-board Speed Control via a Phase Locked
Loop that accepts a once-per-rev reference
frequency and locks the motor to that frequency. The L6238 can accomodate a wide
range of speeds.
The L6238 achieves Spindle Synchronization
by locking to a once-per-rev reference that is
common to multiple drives. The L6238 has a
multiplexer that enhances the versatility of the
controller. This first multiplexer selects either
internal feedback, (generated by the Bemf of
the motor), or external feedback (embedded
index).
An External P-Channel FET can be connected
to the FET can be connected to the FET
Bridgefor HigherPower Applications.
In this configuration, the internal DMOS drivers
are sequenced in full conduction state and the
external PFET is the linear control element. An
internal inverting buffer from the output of the
OTAcontrolsthe conductionof the EXT PFET.
An internal Virtual Center Tap is used if the
motorcenter tap is not connected.
The motor Current Limit can be set by an externalresistor divider.
A Serial Port is included so that I/O can be
done with a minimum of pins. Key control and
status lines are also bonded out to achieve a
MinimumConfigurationwithout using the Serial
Port.
Programmable Functions include Phase
Switch Timing Optimization for motor efficiency, Speed Lock Threshold, Auto-Start or
mPSupervised Spinup, and output current limitinggain.
Energy Recovery Mode for Head Retraction,
followedby Dynamic Braking Mode.
Logic signals are CMOS Compatible.
Stuck Rotor and Backward Rotationdetection.
Automatic Thermal Shutdown with early warn-
ing bit available in the statusregister
PIN FUNCTIONS
N. Name I/O Function
1 OUTPUT B I/O DMOS Half Bridge Output and Input B for Bemf sensing.
2 SPIN SENSE O Toggless at each Zero Crossing of the Bemf.
3 BRAKE DELAY I Energy Recovery time constant, defined by external R-C to ground.
4R
5 CHARGE PUMP 2 I Negative Terminal of Pump Capacitor.
6, 7,
17, 29,
39, 40
8 CHARGE PUMP 1 I Positive terminal of Pump Capacitor.
9 CHARGE PUMP 3 I Positive terminal of StorageCapacitor.
10 OUTPUT A I/O DMOS Half Bridge Output and Input A for Bemf sensing.
11, 42 V
12 V
13 SER PORT
14 SER DATA R/W I Selects Serial Data Read or Write Function.
15 SER STROBE I Dtat Strobe Input.
16 SER PORT CLK I Clock for Serial Data Control.
18 SER DATA I/O I/O Data stream Input/Output for Control/Status Registers.
19 EXT/INT I Selects thr Internal BEMF ZeroCrossing or an External Source as Feedback
20 FREF ENABLE I A zero on this pin passes thePLL Fref signal to the Freq/phase detector.
21 LINEAR I This input should be grounded or left unconnected.
22 OUTPUT
sense
GROUND I Ground terminals.
power
analog
DISABLE
ENABLE
O Outputs A+B connections for the Motor Current Sense Resistor to ground
I Supplies the voltage for the Power Section.
I 12V supply.
I Input for tri-stating the serial port.
Frequency for te PLL.
I Tristates Power Output Stage when a logic zero.
3/35
L6238
PIN FUNCTIONS (continued)
N. Name I/O Function
23 RUN/BRAKE I Rising edge will initiate start-up. A Brakingrountine is started when this input is
24 SEQINCREMENT I A low to high transition on this pin increments the Output State Sequencer.
25 SYSTEM CLK I Clock Frequency for the system timer/counters.
26 EXT INDEX I External Source of Feedback for the PLL.
27 PLL Fref I Reference Frequency for the PLL.
28 LOCK O High when the PLL is phase_locked.
30 Vlogic I Logic power supply.
31 DETECTOR OUT O Output of Frequency/Phase Detector.
32 FILTER IN I Filter Input.
33 FILTER COMP O Filter output and compensation.
34 CSA INPUT I Input to the Current Sense Amplifier.
35 Rsense O Output C connection for the Motor Current Sense Resistor to ground.
36 OUTPUT C I/O DMOS HalfBridge Output and Input C for Bemf sensing.
37 gm COMP I A series RC network to ground that defines the compensation of the
38 GATE DRIVE I/O Drives the Gate of the External P Channel DMOS Driver for Higher Power
41 I LIMIT SET I A voltage applied to this pin, in conjunction with the value for the external
43 CENTER TAP I Motor Center Tap used for differentialBEMF sensing. If the center tap of the
44 SLEW RATE I A resistor connected to this pin sets the Voltage Slew Rate of the Output
brought low.
Transconductance Loop.
Applications. This pin must be grounded if an external driver is not used.
Motor Current Sensing resistor, defines the maximum Motor Current.
Motor is not brought out, a virtual center tap is integrated and available at this
pin.
Drivers.
ELECTRICAL CHARACTERISTICS (Refer to thetest circuit,unless otherwise specified.)
Symbol Parameter Test Condition Min. Typ. Max. Unit
POWER SECTION
V
Power
R
DS(on)
I
o(leak)
V
F
dVo/dt Output Slew Rate R
I
m(max)
I
gt
T
sd
T
hys
T
ew
I
snsin
G
V
Z
inCT
Motor Supply 10.5 12 13.5 V
Output ON Resistance Tj=25°C
T
= 125°C
j
0.25 0.33
0.50
Output Leakage Current 1 mA
Body Diode Forward Drop Im= 2.0A 1.5 V
= 100KΩ 0.30 V/µs
slew
Motor Current Limit (Note 1) Rs= 0.33Ω
I
Gate Drive for Ext. Power
DMOS
lim
I
lim
I
LIMSET
I
lim
Gain = 0
Gain = 1
=5V
Gain = 0
TBD
TBD
0.75
0.38
TBD
TBD
5mA
V33 = 0V, V38 = 5V
Shut Down Temperature 150 180 °C
Recovery Temperature
30 °C
Hysteresis
Early Warning Temperature Tsd-25 °C
Current Sense Amp Input Bias
10 µA
Current
Current Sense Amp Voltage
3.8 4 4.2 V/V
Gain
Center Tap Input Impedance 30 KΩ
Ω
Ω
A/V
A/V
4/35
ELECTRICAL CHARACTERISTICS (Continued)
Symbol Parameter Test Condition Min. Typ. Max. Unit
LOGIC SECTION
V
inH
V
inL
I
inH
I
inL
V
outL
V
outH
F
sys
t
on
t
off
SEQUENCE INCREMENT
t
seq
SERIAL PORT TIMINGNote: C
Fshift Clock Frequency 2 TBD MHz
t
os
t
settle
t
strobe
t
wait
t
ds
t
dh
t
sd
tcd Clock to Data Prop. Delay (*) 100 ns
t
sd
t
tsd
t
wrs
t
scr
t
csw
PHASE LOCK LOOP SECTION
T
phse
BRAKE DELAY SECTION
V
chrg
I
out3
V
Thres
CHARGE PUMP
V
out9
V
leak
F
cp
(*) These parameters are a function of C
Input Voltage TBD
TBD
Input Current
1 µA
–1
Output Voltage V
= 2mA
sink
V
= 2mA 4.5
source
0.5 V
System Clock Frequency 8 12 MHz
Clock ON Time 20 ns
Clock OFF Time 20 ns
Time Between Rising Edges 1 µs
(data I/O) = 50pF;
load
Operating Set-up Time 50 ns
Enabling Settling Time 50 ns
Strobe Pulse Width 40 ns
Disable Wait Time 40 ns
Data Setup Time 100 ns
Data Hold Time 10 ns
Strobe to Data Prop. Delay (*) 100 ns
Data I/O Activation Delay (*) 100 ns
Data I/O Tri State Delay 80 ns
Write to Read Set-up Time 50 ns
Strobe to Clock Time
50 ns
(Read Mode)
Clock toStrobe Time
50 ns
(Write Mode)
Static Phase Error 20 µs
Capacitor Charge Voltage RT = 50K TBD 9.5 TBD V
Source Current 0.5 mA
Delay Timer Low Trip Threshold TBD 1.8 TBD V
Storage Capacitor Output
20 V
Voltage
Blocking Diode Leakage Current 10 µA
Charge Pump Frequency 300 KHz
.
load
L6238
V
V
mA
V
5/35
L6238
FUNCTIONAL DESCRIPTION
1.0 INTRODUCTION
1.1 Typical Application
In a typical application, the L6238 will operate in
Figure1: StandAlone Configuration
conjunction with the L6243 Voice Coil Driver as
shown in Fig. 1. This configuration requires a
minimum amount of external components while
providingcompletestand-aloneoperation.
6/35
L6238
1.2 Input Default States
Figure2: InputStructures
FUNCTION CONFIGURATION
PORT DIS
STROBE
PORT CLK
R/W
DATA I/O
EXT/INT
FREF ENABLE
LIN
OUTPUT ENABLE
RUN/BRAKE
SEQ INCR
SYS CLOCK
EXT INDEX
PLL FREF
PULL-UP
PULL-DOWN
PULL-UP
PULL-UP
PULL-UP
PULL-DOWN
PULL-DOWN
PULL-DOWN
PULL-DOWN
PULL-UP
PULL-DOWN
PULL-UP
PULL-UP
PULL-UP
Figure 2 depicts the two possible input structures
for the logic inputs. If a particular pin is not used
in an application, it may either be connected to
ground or VLOGIC as required, or simply left unconnected. If no connection is made, the pin is
either pulled high or low by internal constant current generatorsas shown
A listing of the logic inputs is shown with the correspondingdefaultstate.
1.3 Naming Convention
In order to differentiatebetweenthe various types
of control and status signals, the followingnaming
conventionisused.
BOLDCAPITALS - Devicepins.
Italics -
Serialport controland status signals.
Threeinput signals form a special case. Referring
to figure 3, the RUN/BRAKE input pin and the
Run/Brake
tion, while OUTPUT ENABLE and
control signal form a logical AND func-
Output Enable
form an OR function. The outputs signal names,
in Bold Lowercase labeled Run/Brakeand Out-
put Enable will be used when referring to these
Figure3: Input Logic
signals. Although not shown, SEQUENCE INCREMENT and
Sequence Increment
also form
an OR function, with the resultant output signal
calledSequenceIncrement.
1.4 Modes of Operation
Thereare 5 basic modes of operation.
1) Tristate
When Output Enable is low, the output power
driversare tristated.
2) Start-Up
With Output Enable high, bringing Run/Brake
from a low to a high will energize the motor and
the system will be driven by the Fully-Integrated
StartUp Algorithm. A user-defined Start-Up Algorithm, under control of a MicroProcessor, can be
achieved via a serial port and/or external control
pins.
3) Run
Identified by the Lock signal, Run mode is
achievedwhen the motor speed (controlledby the
Internal PLL) reaches the nominal speed within a
predefinedphaseerror.
4) Park
When Run/Brake is brought low, energy to park
the heads may be derived fromthe rectifiedBemf.
The energy recovery time is a function of the
Brake Delay Time Constant. In this state, the quiescent current of the device is minimized (sleep
mode).
5) Brake
After the Energy Recovery Time-Out, the device
is in Brake, with all lower Drivers in full conduction.
Duringa power down, the Park Mode is triggered,
followedby a DynamicBrake.
There are two mutually exclusive conditions
which may be present during the Tristate Mode
(wake up):
7/35
L6238
a)the spindle is stopped.
b)the system is still running at a speed that
allows for resynchronization.
In order to minimize the ramp up time, the microcontrollerhas the possibilityto:
check the SPIN SENSE pin, (which toggles at
Figure4: StateDiagram
From Anywh er e
Auto/Ext = 0
Hold for
”Align & Go”
Power
on
Reset
1
=
k
r
0
B
=
n
a
u
n
R
E
t
u
O
0
=
a
n
E
t
n
u
E
t
O
u
O
N
Hold
for
”Resync”
0
=
0
a
=
a
n
E
t
u
O
c
Z
o
Star t
”Resync”
RunB r k = 0
OutEna = 0
0
=
e
k
a
r
B
n
u
R
R
StrRtr = 0
&
1
=
e
k
a
r
B
n
u
the Bemf zero crossing frequency)
enable the power to the motor based on the
previousinformation. Otherwise the uP may issue a Brake command, followed by the startup procedure after the motor has stopped spinning.
Auto St ar t-up
Enabled Disabled
RunBr k = 1
OutEna = 0
Hold & wai t
for d ecisio n
O
u
O
t
E
u
n
t
E
a
n
=
a
0
=
1
OutEna = 1
&
RunBr k = 1
Stuck
Rotor
(hold)
RunB r k = 0
OutEna = 0
SeqInc = X
RunBr k = 1
OutEna = 1
”A lign & Go”
”A lign & Go”
Brake
W/Mask
RunBrk = 1
Tri -sta t e
W/Mask
OutEna = 1
Run
W/Mask
RunBrk = 0
Hold fo r
RunBrk = 1
[Align to Phase # 1]
Star t
Action acro ss
line increments
sequ enc er
RunBrk = 0
SeqInc = 0
SeqInc = 1
OutEna = 0
SeqInc = 0
SeqIn c = 1
OutEna = 1
RunB r k = 0
O
O
u
O
t
E
u
n
t
E
n
a
=
0
A
l
i
g
n
Tri - s t ate
W/Mask
RunB r k = 1
OutEna = 0
Run
Wo/Mask
RunBrk = 1
OutEna =1
&
u
t
E
n
a
=
a
0
=
0
=
0
8/35
o
N
c
Z
Resyn c = 1
Release
min mask
(Get 1st Zc)
Zc Reset=
StrRtr = 0
(
G
e
Z
t
c
R
e
Align = 1
[Align to
G
Phase # 3]
o
=
Align =
Seqncr.
2
n
d
Z
s
e
c
t
)
=
Mono = 0
StkRtr = 0
Run
1
=
o
G
0
L6238
2.0 STATE DIAGRAMS
2.1 State Diagram
Figure 4 is a complete State Diagram of the controller depicting the operational flow as a function
of the control pins and motor status. The flow can
be separatedintofour distinct operations.
Figure5: Align+Go
RunBrk = 1
OutEna = 0
Power
on
Rese t
Hold
for
”Resync”
RunBrk = 0
RunBrk = 1
2.2 Align + Go
Figure 5 represent the normal flow that will
achieve a spin-up and phase lock of the spindle
motor. Upon power up, the controller first checks
to determine if the motor is still spinning. This
”Hold For Resync” decision block will be discussedlater.
Hol d & wa i t
for decisio n
OutEna = 1
OutEna = 0
Hold fo r
”Align & Go”
OutEna = 0
&
Run Br k = 0
RunBrk = 1
[Align to Phase # 1]
Start
”Align & Go”
Align = 1
[Align to
Align =
Seqncr.
Go = 1
Run
O
u
O
t
u
O
u
Phase # 3]
E
t
n
E
a
n
t
E
n
A
=
a
0
=
0
a
=
0
l
i
g
n
=
0
G
o
=
0
9/35
L6238
Assuming the motor is stationary, with Output
Enable high and Run/Brake low, the controlleris
in the ”Hold for Align & GO” state. When
Run/Brake is brought high, the motor is in align
mode with Phase 1 active (Output A high and
Output B low).
Align is
time-out (user-programmable), the
high and the sequencer double increments the
outputs to Phase 3 (Output B high and Output C
low). After the next time-out, the controller enters
the Go mode, with the sequencer automatically
incrementing the output phase upon detection of
the motor’s Bemf.
Never command an Align & Go unless a reference signal is present at PLL FREF, since this
is the signal that determinesthe length of time
that phase 1 remains active.
If Run/Brake is brought low, (or if the 5V supply
is removed) the controller will revert to ”Hold for
Align & GO” and the serial port will be reinitialized. In order to prevent an erroneous restart condition, it is necessary that Run/Brake be held low
until the motor has completely stopped. Once the
motor has stopped, Run/Brake may be brought
high for a completeAlign & Go Start-Up routine.
a zero. After the align
Align
bit goes
2.3 Resynchronization
If power is momentarily lost, the sequencer can
automatically resynchronize to the monitored
Bemf. This resychronization can either occur
wheneverOutput Enable is first brought low then
high or if the Logic Supply is momentarilylost.
Referring to figure 6, the ”Hold for Resync” state
is entered upon POR (Power On Reset) or whenever Output Enable is brought low. The controller leaves this state and enters ”Start Resync”
when Output Enable is high.
If zero crossings are detected,the sequencer will
automatically lock on to the proper phase and
bringthe motor speed up to PhaseLock.
This resynchronization will take effect with the
motor speed running as low as typically 30% of
it’snominal value.
Never command an Align & Go while the motor is spinning. Always initiate a resync first
or initiate brake mode and allow the motor to
spin down.
Figure6: Resync.
Power
on
Reset
1
=
k
r
0
B
=
n
a
u
n
R
E
t
u
O
0
=
a
n
E
t
n
u
E
t
O
u
O
N
N
a
o
o
0
=
O
Z
Z
a
n
E
t
u
c
c
Hold
”Resync”
0
=
Start
”Resync”
Resync=1
Release
min mask
for
OutEna=1
Zc Reset =
(Get 1st Zc)
10/35
Run
(Get 2nd Zc)
Zc Reset =
2.4 Stuck Rotor/Monotonicity
Refer to figure 7. In order to alert the microprocessor of fault conditions, two bits are available in
the Serial Port’s StatusRegister.
1. Stuck Rotor
If the controller enters the Go mode after the Double Align, Bemf must be detected within 419ms
when using a system clock frequency of 10MHz.
If this condition is not met, the outputs will be tristated and set this bit to a zero. The controller enters the ”Stuck RotorHold” state.
Figure7: StuckRotor/Monotonicity.
OutEna = 1
&
RunB rk = 1
Stuck
Rotor
(hol d)
Mono = 0
StkRtr = 0
Run
L6238
2. Mono
When the motor spins up normally, the resultant
S P IN SENSE pulses rise in frequency in a
monotonic pattern. Any fault condition that would
cause a rapid decrease in the SPIN SENSE frequency would be detected by internal counters
setting the
MONO
condition
2.5 External Sequencing
Although the user-defined Start-Up Algorithm is
flexible and will consistently spin up a motor with
minimum external interaction, the possibility exists where certain applications might require complete microprocessorcontrolof start-up.
The L6238 offers this capability via the SE-
QUENCE INCREMENT input. Referring to figure
9, with Output Enable and Run/Brake low, the
controller is in the ”Hold and Wait for Decision”
state. If the SEQUENCE INCREMENT pin is
brought high during this state, the Auto StartUp
Algorithm is disabled and the sequencer can be
controlledexternally.
When Output Enable and Run/Brake are
broughthigh, the sequencer is incremented every
time that the SEQUENCER INCREMENT pin is
first brought low and then high. During the time
that this pin is high, all Bemf information is
bit low and forcing a Brake
Figure8: Ext. Sequence.
1
=
k
r
B
0
n
=
u
a
R
n
E
t
u
O
”Resync”
Power
on
Reset
Hold
for
e
k
a
r
B
n
u
R
OutEna = 0
&
RunBrk = 0
Hold & wait
for decision
0
=
1
=
e
k
a
r
B
n
u
R
Auto Start-up
Enabled Disabled
RunBrk = 1
OutEna =0
O
u
t
O
E
u
n
t
a
E
=
n
a
=
RunBrk = 1
0
OutEna = 1
1
RunBrk = 0
OutEna =0
SeqInc = X
W/Mask
RunBrk = 1
Tri-st ate
W/Mask
W/Mask
Hold for
”Align & Go”
Brake
OutEna = 1
Run
RunBrk = 0
Action across
line incr ement s
sequencer
RunBrk = 0
SeqInc = 0
SeqInc = 1
OutEna = 0
SeqInc = 0
SeqInc = 1
OutEna = 1
&
RunBrk = 0
Tri-state
W/Mask
RunBrk = 1
OutEna = 0
Run
Wo/Mask
RunBrk = 1
OutEna = 1
11/35
Loading...