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5 BIT DYNAMIC DAC CONTROLLER FOR MOBILE CPU
DYNAMICDAC DETECTIONON CHIP
PROGRAMMABLE OUTPUT FROM 0.925V
TO 2.0V WITH 0.05V AND 0.025V BINARY
STEPS
ULTRA HIGH EFFICIENCY
SEPARATE 5V BIAS SUPPLY AVAILABLE
FOR HIGHEFFICIENCY PERFORMANCE
EXCELLENT OUTPUT ACCURACY ±1%
OVER LINE, LOAD AND TEMPERATURE
VARIATIONS
HIGH PRECISION INTERNAL REFERENCE
DIGITALLY TRIMMED
OPERATING SUPPLY VOLTAGE FROM
4.75V TO 25V
VERYFAST LOAD TRANSIENT
REMOTESENSINGINPUTS
INTERNAL LINEAR REGULATOR 2.5V
/150mA, ±2% PRECISION
POWERMANAGEMENT
- PROGRAMMABLEPOWER-UPTIME
- POWER GOOD OUTPUT,SKIP MODE
- OUTPUTOVERVOLTAGEPROTECTION
- OUTPUTUNDERVOLTAGELOCKOUT
OPERATINGFREQUENCYUP TO1MHz
MEETS INTELMOBILE PENTIU
III
L5996
PRELIMINARY DATA
TQFP32
(7mm x 7mm)
Application
ADVANCEDMICROPROCESSORSUPPLIES
POWERSUPPLYFOR PENTIUM
BILE
DESCRIPTION
The L5996is a powersupply controller that offers
a complete power management for notebook
CPUs of the nextgenerationespecially for mobile
Pentium III. A high precise 5 bit digital to analog
converter (DAC) allows to adjust the output voltage from 0.925V to 2.0V. Dynamic DAC code
changes are detected on chip in order to switch
the output voltage between 1.3V and 1.45V in
less tahn 100µs.The high precision internal refer-
III INTEL MO-
TYPICALAPPLICATIONCIRCUIT
L5996
4.75V
FREQ
25V
SETTING
SYNC
NOSKIP
3.3V
to
PWM SECTIONS
DAC
POWER
MANAGEMENT
&
SYSTEM
SUPERVISOR
2.5V LIN. REG.
July 1999
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
POWER
SECTION
D0
D1
D2
D3
D4
POWER GOOD
ENABLE
2.5V
D98IN997A
V
O
0.925V to 2.0V
CPU CORE
PentiumIII
Mobile
CPU CLK
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L5996
PIN CONNECTION
32 3031 29 28 27 26 25
1
ENABLE
2
VIN
3
REG5
4
V5SW
SSTART
HRSNS
LRSNS
5
6
7
8
910
DISPROT
BLOCK DIAGRAM
REG5
Cboot
Rsense
L
C
Load
POWERGOOD
RGATE
PWRGND
RSTRAP
11 12 13 14 15 16
VFB
COMP
VPROG
SNSGND
LRSNS
HRSNS
COMP
RSTRAP
HSTRAP
VIN
HGATE
HSRC
PWRGND
SNSGND
VFB
VSS
HSTRAP
HGATE
O2.5
IN2.5
V
V
9
8
7
10
29
28
27
26
30RGATE
31
12
16
HSRC
VBG
NOSKIP
24
23
22
21
20
19
18
17
VSS
SLOPE
Hside
Lside
OSC
VID4
VID3
VID2
VID1
VID0
ICURLIM
OSC
FREQ
D98IN998
OSCILLATOR
and
SYNC
18 17
+
-
-
ERROR
SUMMING
+
+
-
VPROG
CONTROL
LOGIC
FREQ
WINDOW
COMP
OVER CURRENT
COMPARATOR
+
-
ZERO
CROSSING
COMPARATOR
+
-
SKIPPING
PULSE
COMPARATOR
+
-
OVER/UNDER
COMPARATOR
19
ICURLIM
DESCRIPTION
(Continued)
ence, digitallytrimmed, assuresthe selected output voltage to within +/-1%over temperature and
battery voltage variations.
Thanks to the remote sensing inputs and to the
window comparator system,embedded in the error summing structure, the device provides excellent load transient performance. The high peak
current gate drive affords to have fast switching
to the externalpower mos, performing an high efficiency. A complete power management include
on board a programmable power-up sequencing,
power good signal, skip mode operation and undervoltege detection. The L5996 assures a fast
protection against load overvoltage and load
overcurrent. Linear regulator on-board is available with an output voltage of 2.5V (+/-2%) and a
current capability of 150mA, useful for CPU
CLOCK BUS.
CSOFT
SSTART
6
SOFT
START
HRSNS LRSNS
VOLTAGE
D98IN999
VID0 VID1 VID2 VID3
20 21 22 23
PROGRAMMABLE
BANDGAP
&
REFERENCE
INTERNAL SUPPLY
LINEAR
REGULATOR
VPROG
MANAGEMENT
25
NOSKIP
VID4
POWER
DISPROT
V
IN2.5
24
13
V
14
LIN.
11
32
3
4
2
1
O2.5
VBG15
VPROG
REG5
C5
V5SW
VIN
PWGOOD
ENABLE
2.5V
REG.
5
Vdc
5.5V to 25V
5V
V
IN3.3V
VCPUCLK
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VIN to PWRGND -0.5 to 27 V
PWRGND to VSS ±0.5 V
VREFS to PWRGND 5 V
HSTRAP, HGATE to PWRGND -0.5V to VIN+14V
RSTRAP, RGATE to PWRGND -0.5V to 14V
EABLE, FREQ, OSC, COMP, VFB, HRSNS, LRSNS 5 V
VID0-3, NOSKIP 7 V
Junction Temperature Range -40 to 150 °C
Storage Temperature Range -55 to 150 °C
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T
j
T
stg
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THERMAL DATA
Symbol Parameter Value Unit
R
Th j-amb
Thermal Resistance Junction to Ambient 60 °C/W
L5996
ELECTRICALCHARACTERISTICS
•
= specifications referred to TJfrom0 to 70°C.
= 12V; Ti=25°C,OSC = GND,unless otherwise specified)
(V
IN
Symbol Parameter Test Conditions Min. Typ. Max. Unit
DC CHARACTERISTICS
V
Input Supply Voltage • 4.75 25 V
IN
Operating Quiescent Current RGATE = HGATE =OPEN
I
OP
•
0.9 1.1 mA
ENABLE = REG5
I
Stand-By Current ENABLE = GND
SB
VIN = 12V
V
= 25V
IN
•
80
100
150
180
INTERNAL REGULATOR (VREG5)
V
I
REG5
Output Voltage VIN= 7.5V to25V
REG5
Total Current Capability CREG5 = 4.7µF
I
LOAD
C
REG5
V
IN
V
IN
=0 to 5mA,
= 4.7µF
= 5.5V
≥ 6V
4.9 5.0 5.1 V
25
60
Switch-Over Threshold Voltage 4.3 4.5 4.7 V
Current Capability
(internal switch on)
V
V
5SW
REG5
= 4.5 to5.5V
≥ 4.4V
25 mA
2.5V REFERENCE VOLTAGE
V
O 2.5
I
VO 2.5 MAX
Regulated Voltage V
Regulation over Lineand Load 6V < V
Current Limit V
= 3.3V
IN 2.5
C
=47µF
VO 2.5
I
= 10mA
O2.5
< 25V
IN
V
= 3.3V
IN 2.5
I
= 0-150mA
O2.5
= 3.3V 500 mA
IN 2.5
• 2.45 2.5 2.55 V
• 2.425 2.5 2.575 V
PROGRAMMABLE REFERENCE VOLTAGE AND VBG
V
PROG
Accuracy V
ID0,VID1,VID2,VID3,VID4
•
-0.5% V
PROG
+0.5% V
see Table 1.
V
V
Ouput Voltage Accuracy Line andLoad Regulation
FB
included, V
V
, see Table 1.
ID4
Band Gap reference C
BG
VBG
= 220nF
ID0,VID1,VID2,VID3
• -1% V
,
•
1.240 1.246 1.252 V
PROG
+1% V
POWER MANAGEMENT
Enable Voltage HIGH LEVEL 2.4 V
Disable Voltage LOW LEVEL 0.8 V
Power Good Saturation
= 400µA 0.4 V
I
sink
Voltage
NOSKIP Mode (Active high) High Level
0.8 V
Low Level 2.4
Output UVLO Threshold OVP = GND 60 70 80 %
Output UVLO Lockout Time Depending on C
value 775 ms/µF
SS
µ
µA
mA
mA
V
A
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