SGS Thomson Microelectronics L5994 Datasheet



DUAL PWM BUCK CONTROLLERS ADJUSTABLE

1.9V to 5V(Section 1)

1.66V to 3.5V (Section 2) 12V/120mALINEAR REGULATOR DUALSYNCH RECTIFIERSDRIVERS 96%EFFICIENCYACHIEVABLE 50µA (@ 12V) STAND BY CONSUMPTION

5.0V TO 25V SUPPLY VOLTAGE EXCELLENTLOAD TRANSIENTRESPONSE DISABLEPULSE SKIPPINGFUNCTION OUTPUTUNDERVOLTAGESHUTDOWN POWERMANAGEMENT:

- UNDERAND OVERVOLTAGEOUTPUT DETECTION

- POWER GOOD SIGNAL

- SEPARATEDDISABLE

THERMALSHUTDOWN PACKAGE:TQFP32

APPLICATION

NOTEBOOK AND SUBNOTEBOOK COMPUTERS

PENTOP AND PORTABLE EQUIPMENT COMMUNICATINGCOMPUTERS

DESCRIPTION

The L5994 is a sophisticated dual PWM stepdown controller and power monitor intended for

SYSTEM BLOCK DIAGRAM

L5994

ADJUSTABLETRIPLE OUTPUT

POWER SUPPLY CONTROLLER

PRODUCT PREVIEW

TQFP32

ORDERING NUMBER: L5994

Notebook computer and/or battery powered equipment. The device produces regulated 1.8V,

2.5V (both adjustable)and 12V supplies for use in portableand PCMCIA applications. The internal architecture allows to operate with minimum external componentscount. A very high switching frequency (200/300 KHz or externally synchronizable) optimizes their physical dimensions. Synchronous rectification and pulse skipping mode for the buck sections optimise the overall efficiencyover a wide load current range. The two high performance PWM controllers for

1.8V and 2.5V lines are monitored for overvoltage, undervoltage and overcurrent conditions. On detection of a fault, a POWER GOOD signal is generated and a specific shutdown procedure takes place to preventphysical damage and data corruption. A disable function allows to manage the output power sections separately, optimising the quiescent consumptionof theIC in stand-byconditions.

2.5V

25V

L5994

POWER

SECTION

1.8V

µP

SYNC

POWER

MANAGEMENT

& SYSTEM

SUPERVISOR

D98IN862

September 1999

This is preliminary information on a new product now in development. Details are subject to change withoutnotice.

12V LDO

5.1V LDO

3.39V REF

POWER GOOD

MEMORY

PERIPHERALS

1/8

L5994

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

OUT

Power Supply Voltage on V

Maximum Pin Voltage to Pins 1, 24, 25, 32 -0.5 to (VIN+5) V Input Current Except V13IN and V

Output Current Digital Output -15 to +15 mA Junction Temperature -55 to 150 °C

THERMAL DATA

Symbol Parameter Value Unit

TH J-amb

Thermal Resistance Junction -Ambient 60 °C/W

PIN CONNECTION(Topview)

H1GATE

R1GATE

H1SRC

PREG5

PGND

R2GATE

H2SRC

H2GATE

32 3031 29 28 27 26 25

H1STRAP

VIN

SREG5

V5SW

V1SNS

I1SNS

COMP1

SOFT1

1 2 3 4 5 6 7 8

11 12 13 14 15 16

910

24 23 22 21 20 19 18 17

H2STRAP PWROK2 REG12 V13IN V2SNS I2SNS COMP2 SOFT2

0to25 V

-1 to +1 mA

BLOCK DIAGRAM

I1SNS

V1SNS

COMP1

H1STRAP

H1GATE

H1SRC

R1GATE

PREG5

W5SW

VIN

SREG5 3

12VREF

SGND

SOFT2

SOFT

UNDERVOLT

COMPARATOR

OSC

NOSKIP

I2SNSV2SNS

RUN2

OVER

COMPARATOR

ZERO

COMPARATOR

PULSE

COMPARATOR

PWROK2

ERROR SUMMING

CURRENT

CROSSING

SKIPPING

VREF

∑

VREF

CONTROL

LOGIC

13V UVComp

13V

OSCILLATOR

SYNCHRONIZATION

RUN1

VREF

CRST

PWROK1

SOFT1

SLOPE

VREF

Hside

REG5 PREG5

Lside

COMPARATOR

VREF BUFFER

CONTROL

SWITCH

ERROR SUMMING

∑

LOGIC

LINEAR

REGULATOR

CURRENT

OVER

COMPARATOR

ZERO

CROSSING

COMPARATOR

PULSE

SKIPPING

COMPARATOR

V5SW

4.7V

VREF

SOFT

I1SNS V1SNS

OVERVOLT

COMPARATOR

MANAGEMENT

POWER

SYSTEMSUPERVISOR

16 11 10 14 9

RUN2 RUN1 PWROK1 NOSKIP CRST

D98IN863A

Hside

Lside

SLOPE

D98IN864

REG12

LDO

19 20 18

I2SNS V2SNS COMP2

H2STRAP

H2GATE

H2SRC

R2GATE

PGND

V13IN

REG12

OSC

2/8

PIN FUNCTIONS

N. Name Description

1 H1STRAP Section 1 section bootstrap capacitor connection 2V 3 SREG5 Signal 5V. It should be connected to PREG5 pin. 4 V1SW Alternative device supply voltage. 5 V1SNS Thispin connects to the (-) input of the section 1 internal current sense comparator 6 I1SNS This pin connects to the (+) input of the section 1 internal current sense comparator 7 COMP1 Feedback input for the section 1. 8 SOFT1 Soft-start input of the section 1. The soft-start time is programmed by an external capacitor

9 CRST Input used for start-up and shut-down timing. A capacitor defines a time of 2ms/nF.

10 PWROK1 Power-good diagnostic signal. This output is driven high when section 1 is enabled and

11 RUN1 Control input to enable/disable the section 1. A high level (>2.4V) enables this section, a low

12 VREF Internal +2.5V high accuracy voltagegenerator. It can source 5mA to external load. Bypass to

13 SGND Signal ground. Reference for internal logic circuitry. It must be routed separately from high

14 NOSKIP Pulse skipping mode control. A high level (>2.4V) disables pulse skipping at low load current,

15 OSC Oscillator frequency control: connect to 2.5V to select 300KHz operation, to ground or to 5V

16 RUN2 Control input to enable/disable the section 2. A high level (>2.4V) enables this section, a low

17 SOFT2 Soft-start input for thesection 2. The soft-start time is programmed by an external capacitor

18 COMP2 Feedback input for the section 2. 19 I2SNS This pin connects to the (+) input of the section 2 internal current sense comparator 20 V2SNS This pin connects to the (-) input of the section 2 internalcurrent sense comparator 21 V13IN 12V regulator input supply voltage, included between 13 and 20V. This voltage can be

22 REG12 12V regulatoroutput voltage. It can source up to 150mA toan external load 23 PWROK2 Power good diagnostic signal. This output is driven high when section 2 is enabledand

24 H2STRAP Section 2 bootstrap capacitor connection 25 H2GATE Gate- driver output for the section 2high-side N-MOS 26 H2SRC Section 2 high-side N-MOS source connection 27 R2GATE Gate- driver output for the section 2low- side N-MOS (synchronous rectifier). 28 PGND Current return for drivers 29 PREG5 +5V regulator supply. Used mainly for bootstrap capacitors. It should bebypassed to ground. 30 R1GATE Gate-driver output for the section 1 low-side N-MOS (synchronous rectifier). 31 H1SRC Section 1 high-side N-MOS source connection 32 H1GATE Gate-driver output for the section 1 high-side N-MOS

Device supply voltage. From 5.0 to 25V

connected between this pin and SGND. Approximately, 1ms/nF @ full load.

running properly, after a delay defined by the CRST capacitor.

level (<0.8V) shuts it down

ground with a 4.7µF capacitor to reduce noise.

current returns.

a low level (<0.8V) enables it.

for 200KHz operation. A proper external signal can synchronize the oscillator

level (>0.8V) shuts it down.

connected between this pin and GND. Approximately, 1ms/nF @full load.

supplied by a flyback winding.

running properly, after a delay defined by CRST capacitor

L5994

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