SGS Thomson Microelectronics L4990D, L4990A, L4990 Datasheet

L4990
CURRENT-MODECONTROLPWM SWITCHINGFREQUENCYUP TO 1MHz LOW START-UPCURRENT < 0.45mA HIGH-CURRENT OUTPUT DRIVE SUITABLE
FOR POWER MOSFET(1A) FULLY LATCHED PWM LOGIC WITH DOU-
BLE PULSESUPPRESSION PROGRAMMABLEDUTY CYCLE 100% AND 50% MAXIMUM DUTY CYCLE
LIMIT PROGRAMMABLESOFTSTART PRIMARY OVERCURRENT FAULT DETEC-
TION WITH RE-START DELAY PWMUVLO WITH HYSTERESIS IN/OUTSYNCHRONIZATION DISABLELATCHED INTERNAL 100ns LEADING EDGE BLANK-
ING OF CURRENT SENSE PACKAGE:DIP16ANDSO16W
DESCRIPTION
This primary controller I.C., developedin BCD60II technology, has been designed to implement off
L4990A
PRIMARY CONTROLLER
MULTIPOWER BCD TECHNOLOGY
DIP16 SO16W
ORDERING NUMBERS:
line or DC-DC power supply applications using a fixedfrequency current mode control. Based on a standard current mode PWM control­ler this device includes some features as pro­grammable soft start, IN/OUT synchronization, disable (to be used for over voltage protection and for power management), precise maximum Duty Cycle Control, 100ns (typ) leading edge blanking on current sense, pulse by pulse current limit and overcurrent protection with soft start in­tervention.
L4990/L4990A(DIP16)
L4990D/L4990AD (SO16W)
BLOCK DIAGRAM
RCT
3
DC
14
DIS
2.5V
13
ISEN
1.2V
SS
7
July 1999
+
-
-
+
OVER CURRENT
+
-
DIS
BLANKING
1V R
SYNC DC-LIM
TIMING2
T
PWM
FAULT
SOFT-START
2R
12
SGND COMP
25V
16V/10V
VREF OK
CLK
DIS
V
CC
Vref
+
PWM UVLO
-
SQ R
2.5V
+
E/A
-
6
13V
VREF
48151
D98IN1002
9
V
C
10
OUT
11
PGND
5
VFB
1/24
L4990 - L4990A
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC Supply Voltage (I
I
OUT
Output Peak Pulse Current 1.5 A Analog Inputs & Outputs (6,7) -0.3 to 8 V Analog Inputs & Outputs (1,2,3,4,5,15,14 13) -0.3 to 6 V
P
tot
T
j
T
stg
(*) maximum package power dissipation limits must be observed
Power Dissipation @ T Junction Temperature, Operating Range -25 to 125 Storage Temperature, Operating Range -55 to 150
PIN CONNECTION
< 50mA) (*) selflimit V
CC
=70°C1W
amb
C
°
C
°
SYNC
RCT
DC
VREF
VFB
COMP
SS
V
CC
1 2 3 4 5 6 7 OUT
15 14 13 12 11 10
8V
D95IN197
N.C.16 DC-LIM DIS ISEN SGND PGND
9
C
THERMAL DATA
Symbol Parameter Value Unit
R
th j-amb
R
th j-amb Thermal Resistance Junction to Ambient
Thermal Resistance Junction to Ambient DIP16 80 °C/W
SO16
120 °C/W
PIN FUNCTIONS
N. Name Function
1 SYNC Synchronization. A synchronization pulse terminates the PWM cycle and discharges Ct 2 RCT Oscillator pin for external C 3 DC Duty Cycle control 4 VREF 5.0V +/-1.5% reference voltage 5 VFB Error Amplifier Inverting input 6 COMP Error Amplifier Output 7 SS Soft start pin for external capacitor Css 8V 9V
CC
C
Supply for internal ”Signal” circuitry
Supply for Power section 10 OUT High current totem pole output 11 PGND Power ground 12 SGND Signal ground 13 ISEN Current sense 14 DIS Disable. It must never be leftfloating. Tie to SGND if not used. 15 DC-LIM Connecting this pin to Vref, DC is limitedto 50%. If it is left floating or grounded no limitation is
imposed 16 NC Not connected
components
t,Rt
2/24
L4990 - L4990A
ELECTRICALCHARACTERISTICS
CC
= 15V; Tj=0 to 70°C; unless otherwisespecified.)
(V
Symbol Parameter Test Condition Min. Typ. Max. Unit
REFERENCE SECTION
V
O
T
S
Output Voltage Tj=25°C; IO= 1mA 4.925 5.0 5.075 V Line Regulation V Load Regulation I
= 12 to 20V 2.0 15 mV
CC
= 1 to 20mA 5.0 20 mV
O
Temperature Stability 0.4 mV/°C Total Variation Line, Load,Temperature 4.875 5.0 5.125 V
I
OS
Short Circuit Current Vref = 0V 30 150 mA Power Down/UVLO V
= 8.5V; I
CC
= 0.5mA 0.2 0.5 V
sink
OSCILLATOR SECTION
Initial Accuracy T
Accuracy R
Initial Accuracy T
Accuracy R
Duty Cycle pin 3 = 0,7V, pin 15 = Vref
Duty Cycle R
=25°C; RT= 4.42kΩ;
j
C
= 1nF; pin 15 Vref
T
= 4.42K;VCC= 12 to 20V;
T
C
= 1nF; pin 15 = Vref
T
=25°C; RT= 4.42KΩ;
j
C
= 1nF; pin 15 OPEN
T
= 4.42K;VCC= 12 to 20V;
T
C
= 1nF; pin 15 OPEN
T
pin 3 = 0.7V, pin 15 = OPEN
= 4.42kΩCT= 1nF
T
pin 3 = 3.2V, pin 15 = Vref pin 3 = 3.2V, pin 15 = OPEN
285 300 315 kHz
279 300 321 kHz
280 295 310 kHz
275 295 315 kHz
0 0
45
90 Duty Cycle Accuracy pin 3 = 2.02V,pin 15 = OPEN 37 40 43 % Oscillator Ramp Peak 3.0 V Oscillator Ramp Valley 1.0 V
ERROR AMPLIFIER SECTION
Input Bias Current V
V
I
G
OPL
Input Voltage V Open Loop Gain V
SVR Supply Voltage Rejection V
OL Output Low Voltage I
V
OH Output High Voltage I
V
I
O
Output SourceCurrent V Output Sink Current V
to GND 0.2 1.0 µA
FB COMP=VFB
= 2 to 4V 60 90 dB
COMP CC = 12 to 20V 85 dB
= 2mA, VFB= 2.7V 1.1 V
sink
= 0.5mA, VFB= 2.3V 5 6 V
source
> 4V,VFB= 2.3V 0.5 1.3 mA
COMP
= 1.1V,VFB= 2.7V 2 6 mA
COMP
2.42 2.5 2.58 V
Unit Gain Bandwidth 2 4 MHz
S
R
Slew Rate 8 V/µs
PWM CURRENT SENSE SECTION
I
b
I
S
Input Bias Current I Maximum Input Signal V
=0 3 15 µA
sen
= 5V 0.92 1.0 1.08 V
COMP
Delay to Output 100 ns Gain 2.85 3 3.15 V/V
SOFT START
I
SSC
I
SSD
V
SSSAT
V
SSCLAMP
SS Charge Current 14 20 26 SS Discharge Current VSS = 0.6V 200 SS Saturation Voltage DC = 0% 0.6 V SS Clamp Voltage 7 V
LEADING EDGE BLANKING
Internal Masking Time 100 ns
% %
% %
A
µ
A
µ
3/24
L4990 - L4990A
ELECTRICALCHARACTERISTICS
(continued.)
Symbol Parameter Test Condition Min. Typ. Max. Unit
OUTPUT SECTION
V
OL
V
OH
V
OUT CLAMP
Output Low Voltage IO= 250mA 1.0 V Output High Voltage IO= 20mA; VCC= 12V 10 10.5 V
= 200mA; VCC= 12V 9 10 V
I
O
Output Clamp Voltage IO= 5mA; VCC = 20V 13 V Collector Leakage V Fall Time C
Rise Time C
UVLO Saturation V
CC = 20V VC = 24V 100 200 µA
= 1nF
O
C
= 2.5nF
O
= 1nF
O
C
= 2.5nF
O
CC =0VtoV
CCON;Isink
= 10mA 1.0 V
20 35
50 70
60 ns
100 ns
SUPPLY SECTION
V
CCON
V
CCOFF
V
hys Voltage AfterTurn-onHysteresis
I
S
I
op
I
q
I
SH
V
Z
Startup voltage
Minimum Operating Voltage L4990
Start Up Current Before Turn-on at:
Operating Current CT=1nF,RT=4.42kΩ,CO=1nF 12 18 mA Quiescent Current (After turn on), Co =0nF
Shutdown Current 100 270 450 Zener Voltage I8= 20mA 21 25 30 V
V
=V
CC
C
= 1nF, RT= 4.42k,
T
CCON
- 0.5V
L4990
L4990A157.8
9
L4990A
L4990
L4990A
7
5.5
0.5
100 270 450
16
8.4 10
7.6
17
9
11
8.2
6
0.8
7.0 10 mA
SYNCHRONIZATION SECTION
Master Operation
V
1
I
1
Clock Amplitude I Clock Source Current Vclock = 3.5V 7 mA
= 0.8mA 4 V
SOURCE
Slave Operation
V
1
Sync Pulse Low Level 1 V
High Level 3.5 V
I
1
Sync Pulse Current VSYNC = 3.5V 0.8 mA
OVER CURRENT PROTECTION
V
t
Fault Threshold Voltage 1.1 1.2 1.3 V
DISABLE SECTION
Shutdown threshold 2.4 2.5 2.6 V
ns
ns
µ
µ
V V
V
v
V
v
A
A
FUNCTIONAL DESCRIPTION
The I.C. contains a standard PWM current mode control section with improved performance with respectto the UC384Xfamily. Enhanced features include start-up bias current reduced to < 270µA (typ), improved E/A perform­ance (4MHz B/W, 1.3mA Source Current, high­slew rate) accurate 1MHz oscillator, and also re­duced propagation delays in the critical path from Current Sense to Output.
4/24
ADDITIONALFEATURES
SoftStart (SS)
An external capacitor is charged by an internal constant current source (20µA) to generate a SS signal which clamps the E/A output The SS pin doubles as a Fault Reset Delay func­tion as describedbelow.
Current Limit/ Reset Delay
An internal high-speed current limit comparator
L4990 - L4990A
referenced to 1.2V detects primary over-current conditions. On detection of an overcurrent fault the output is immediately shutdown and the fault is also latched. A Fault Reset Delay is imple­mented by discharging the external Soft Start (SS) timing capacitor before resetting the fault latch and initiating a softstart cycle. In case of a continuous fault condition the SS ca­pacitor is charged to 5V before being discharged again, to ensure that the fault frequency does not exceed the programmedsoft start frequency.
Duty CycleLimit
A simple connectionbetween the DC-LIM and the available Vref activatesan internal T- FlipFlop lim­iting the DC to about 50%. If this pin is not con­nected or grounded, the limit of the duty cycle is extended to about 100%
Duty CycleControl
Duty Cycle DC is externally programmed by set­ting a voltage between 1V (0% DC) and 3V (100% DC) at the DC pin. The programmed volt­age is compared with the oscillator C
capacitor
T
charging waveform to determine the maximum ON-time in each period. This function gives a fine control of DC. If this pin is floating the maximum duty cycle de­pends on DC-LIM status.
Synchronization
A SYNC pin eases Synchronization of the IC to the external world ( e.g. another IC working in
parallelor to TV/monitorsyncsignal). In TV/monitor applications the timing components
,CTare set for a frequency lower than the
R
T
minimum TV sync frequency.When the TV circuit has powered-up it takes over and the system fre­quencyis that of the SYNC. Duty Cycle is control­lableusing the DC function. In parallel operation of several IC’s no Mas­ter/Slavedesignationis requiredas the higherfre­quency IC is automaticallythe master. Controllers to be synchronized have their SYNC pins tied to­gether and each SYNC pin operatesas a bidirec­tional circuit. The first IC to drive its SYNC pin is the master and it initiates a discharge of the C timing capacitor of every controller. The Sync in­put signal is edge-triggered and sets an internal ”sync latch” which ensures full discharge of C
.
T
DisableFunction
The DIS pin performs a logic level latched-shut­down function. When pulled above 2.5V it shuts down the complete IC with a standby current of <270µA(typ).
To reset the IC the V
pin must be pulled-down
CC
belowthe lower UVLO threshold (10V).
LeadingEdge Blanking (LEB)
An LEB interval of 100ns has been incorporated into the IC to blank out the current sense signal during the first 100ns from switch turn-on. This provides noise immunity to turn-on spikes and reduces external RC filteringrequirementson the current-sensesignal.
T
Figure 1. Quiescentcurrent vs. input voltage.
(X = 7.6V and Y = 8.4V for L4990A)
Iq [mA]
30
20
8
6
1
0.8
0.6
0.4
0.2 0
0 4 8 12162024
V14 = 0, OSC=disabled Tj = 25°C
X
Vcc [V]
Y
Figure2. Quiescentcurrentvs. input voltage
(after disable).
Iq [uA]
300
270
240
210
8 1012141618202224
Vcc [V]
V14 = Vref
Tj = 25°C
5/24
L4990 - L4990A
Figure 3. Quiescentcurrent vs. input voltage.
Iq [m A ]
9.0
V14 = 0, V5 = Vref
8.5
8.0
7.5
7.0
8 1012141618202224
igure5. Quiescentcurrent vs. input voltage
F
Iq [mA]
36
30
24
Rt = 4 .5 Kohm ,Tj = 2 5°C
1M hz
500Khz 300Khz
100Khz
Vcc [V]
and switching frequency.
Co = 1nF, Tj = 25°C
DC = 100%
1MHz
igure4. Quiescentcurrentvs. input voltage
F
and switching frequency.
Iq [mA]
36
30
24
18
12
6
0
8 10121416182022
Co = 1nF, Tj = 25°C
DC = 0%
1MHz
500KHz
300KHz 100KHz
Vcc [V]
Figure6. Referencevoltage vs. load current.
Vref [V]
5.1
5.05
Vcc=15V Tj = 25°C
18
12
500KHz 300KHz
100KHz
6
0
8 10121416182022
Vcc [V]
Figure 7. Vref vs. junction temperature.
Vref [V])
5.1
5.05
5
4.95
Vcc = 15V Iref = 1mA
5
4.95
4.9 0 5 10 15 20 25
Iref [mA]
Figure8. Vref vs. junctiontemperature.
Vref [V]
5.1
Vcc = 15V
5.05
5
4.95
Iref= 20mA
4.9
-50 -25 0 25 50 75 100 125 150 Tj (°C)
6/24
4.9
-50 -25 0 25 50 75 100 125 150 Tj (°C)
L4990 - L4990A
Figure 9. Vref SVRR vs. switchingfrequency.
SVRR (dB)
120
80
40
0
1 10 100 1000 10000
fsw (Hz)
Vcc=15V Vp-p=1V
Figure 11. Outputsaturation.
Vsat = V [V]
2.5
1.5
10
2
Vcc = 15V Tj= 25°C
Figure10. Output saturation.
Vsat = V [V]
16
14
12
10
10
Vcc = 15V Tj = 25°C
8
6
0 0.2 0.4 0.6 0.8 1 1.2
Isource [A]
Figure12. UVLO Saturation
Ipin10 [mA] 50
40
30
Vcc < Vccon
beforetu rn-on
1
0.5
0
0 0.2 0.4 0.6 0.8 1 1.2
Isink [A]
Figure13.Timingresistorvs.switchingfrequency.
fsw(KHz)
5000 2000
Vcc =15V,V15=0V Tj= 25° C
1000
50 0 20 0
10 0
50 20
5.6nF
2.2nF
100p F 220pF
470pF
1nF
10
10 20 30 40
Rt (kohm)
20
10
0
0 200 400 600 800 1,000 1,200 1,400
Vpin10 [mV]
Figure14. Switchingfrequencyvs. temperature.
fsw (KHz) 320
Rt= 4.5Kohm, Ct = 1nF
310
300
290
280
-50 -25 0 25 50 75 100 125 150
Vcc = 15V, V15=Vref
Tj (°C)
7/24
L4990 - L4990A
Figure 15. Switchingfrequencyvs. temperature.
fsw (KHz) 320
Rt= 4.5Kohm, Ct = 1nF
310
300
290
280
-50 -25 0 25 50 75 100 125 150
Vcc = 15V,V15= 0
Tj (°C)
Figure 17. Maximum Duty Cycle vs Vpin3.
DC ControlVoltage Vpin3 [V]
3.5
V15 = Vref
3
2.5
V15 = 0V
Figure16. Dead time vs Ct.
Dead time[ns]
1,500
Rt=4.5Kohm
V15= 0V
1,200
900
V15= Vref
600
300
246810
TimingcapacitorCt [nF]
Figure18.Delaytooutputvsjunctiontemperature.
Delayto output (ns)
130
120
110
100
2
Rt = 4.5Kohm,
1.5
Ct = 1nF
1
0 102030405060708090100
Duty Cy cle [%]
Figure 19. E/A frequencyresponse.
G [dB]
150
100
50
0
0.01 0.1 1 10 100 1000 10000 100000 f(KHz)
Phase
140
120
100
80
60
40
20
90
80
70
60
-50 -25 0 25 50 75 100 125 150 Tj(°C)
PIN10=OPEN
1Vpulse onPIN13
8/24
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