SGS Thomson Microelectronics L4973V3.3, L4973D5.1, L4973D3.3, L4973V5.1 Datasheet

L4973V3.3 - L4973V5.1
3.5A STEP DOWN SWITCHING REGULATOR
UPTO3.5ASTE PDOWNCO NVERTER OPERATING INPUT VOLTAGE FROM 8V TO
55V
3.3V AND 5.1V (±1%) FIXED OUTPUT, AND ADJUSTABLEOUTPUTSFROM: 0V TO 50V (3.3V type)
5.1VTO 50V (5.1 type) FREQUENCYADJUSTABLEUP TO300KHz VOLTAGEFEED FORWARD ZERO LOAD CURRENT OPERATION (min
1mA) INTERNAL CURRENT LIMITING (PULSE BY
PULSEAND HICCUPMODE) PRECISE 5.1V (1.5%) REFERENCE VOLT-
AGEEXTERNALLYAVAILABLE INPUT/OUTPUT SYNCHRONIZATION FUNC-
TION INHIBIT FOR ZERO CURRENT CONSUMP-
TION (100µA Typ.at V PROTECTION AGAINST FEEDBACK DIS-
CONNECTION THERMAL SHUTDOWN OUTPUTOVERVOLTAGEPROTECTION SOFTSTART FUNCTION
CC
= 24V)
L4973D3.3 - L4973D5.1
MULTIPOWERBCD TECHNOLOGY
POWERDIP(12+3+3) SO20(12+4+4)
ORDERING NUMBERS:
L4973V3.3 (Powerdip)
L4973D3.3 (SO20)
L4973V5.1 (Powerdip)
L4973D5.1 (SO20)
DESCRIPTION
The L4973 is a step down monolithic power switching regulator delivering 3.5A at fixed volt­ages of 3.3V or 5.1V and using a simple external divideroutput adjustable voltage up to 50V.
Realized in BCD mixed technology, the device
TYPICAL APPLICATIONCIRCUIT (POWERDIP)
VCC(8V to 55V)
798
R
OSC
L4973
16
April 2000
C
OSC
1
4,5,6,
13,14,15
C
IN
C2
17
C
SS
D97IN554A
10
11
12
3 2
R
C
C
COMP
COMP
BOOT
D1
L1
VO(3.3V or 5.1V)
C
OUT
1/16
L4973V3.3 - L4973V5.1 - L4973D3.3 - L4973D5.1
uses an internal power D-MOS transistor (with a typicalRdson of 0.15ohm) to obtain very high effi­ciencyand very fast switching times.
Switching frequencyup to 300KHzare achievable (the maximum power dissipation of the packages mustbe observed).
A wide input voltage range between 8V to 55V and output voltages regulated from 3.3V to 40V coverthe majorityof thetoday applications.
Features of this new generation of DC-DC con-
PIN CONNECTIONS(Top view
OSC OUT OUT GND GND GND
V V
BOOT
1 2 3 4 5 6 7
CC
8
CC
9 INH
D94IN162A
POWERDIP (12+3+3)
17 16 15 14 13 12 11 10
)
SYNC18 SS V5.1 GND GND GND VFB COMP
verterincludes pulse by pulse current limit, hiccup mode for output short circuit protection, voltage feed forward regulation, soft start, input/output synchronization,protectionagainst feedback loop disconnection, inhibit for zero current consump­tionand thermal shutdown.
Packagesavailable are in plastic dual in line, DIP­18 (12+3+3) for standard assembly, and SO20 (12+4+4)for SMD assembly.
OSC OUT OUT GND GND GND GND
V
CC
V
CC
BOOT INH
2 3 4 5 6 7 8 9 10
D94IN163A
20 19 18 17 16 15 14 13 12 11
SO20 (12+4+4)
SYNC1 SS V5.1 GND GND GND GND VFB COMP
BLOCKDIAGRAM
ZERO CURRENT
17(19)
SS
VFB
11(12)
5.1V
3.3V
12(13)
18(20)
Pin x = Powerdip Pin (x) = S020
COMP
SYNC
2/16
INH
INHIBIT
+
E/A
-
V5.1
VREF
GOOD
SOFT
START
THERMAL
SHUTDOWN
-
PWM
+
OSCILLATOR
1(1) 2(2) 3(3)
5.1V
3.3V
(4,5,6,7,14,15,16,17)
INTERNAL
REFERENCE
HICCUP CURRENT
LIMITING
CURRENT
LIMITING
RSQ
4,5,6,13,14,15
INTERNAL
Q
V
SUPPLY
CC
DRIVER
5.1V
V
CC
8(9)7(8)16(18)10(11)
CBOOT
CHARGE
BOOT
9(10)
OUTOUTGNDOSC
D94IN161B
L4973V3 - L4973V5 - L4973D3- L4973D5
THERMALDATA
Symbol Parameter Powerdip SO20 Unit
R
th(j-pin)
R
th(j-amb)
(*) Package mounted on board.
ABSOLUTE MAXIMUM RATINGS
Thermal Resistance Junction to pin Max. 12 15 °C/W Thermal Resistance to Ambient Max. 60 (*) 80 (*) °C/W
Symbol
DIP-18 S0-20
V V
7,V8 2,V3
V9,V V2,V
Input voltage 58 V
8
Output DC voltage
3
Parameter Value Unit
Output peak voltage at t = 0.1µs f=200KHz
V
I
2,I3
9-V8
V V V V
9 11 17 12
I2,I
V10-V
V
10
V
12
Maximum output current int. limit.
3
8
Bootstrap voltage 70 V Analogs input voltage (VCC= 24V) 12 V
14 V
V19 Analogs input voltage (VCC= 24V) 13 V
V
13
(VCC= 20V) 6
-0.3
V
18
V
20
(VCC= 20V) 5.5
-0.3
V
10
V
11
Inhibit Vcc
-0.3
P
T
J,TSTG
tot
Power dissipation a T (T
=70°C no copper area)
amb
(T
=70°C 4cm copper area on PCB)
amb
Power dissipation a T
90°C
pins
=90°C SO20 4 W
pins
Junction and storage temperature -40 to 150 °C
DIP 12+3+3
1.3
PIN FUNCTIONS
Powerdip SO20 NAME DESCRIPTION
11 12 COMP E/A output to be used for frequency compensation 10 11 INH A logic signal (active high) disables the device (sleep mode operation).
9 10 BOOT A capacitor connected between thispin and the output allows to drive the
18 20 SYNC Input/Output synchronization. 7,8 8,9 Vcc Unregulated DCinput voltage 2,3 2,3 OUT Stepdown regulator output.
12 13 VFB Stepdown feedback input. Connecting the output directly to this pin results
16 18 V5.1 Reference voltage externally available.
4,5,6
13,14,15
4,5,6,7
14,15,16,17
GND Signal ground
1 1 OSC An external resistor connected between the unregulated input voltage and
If not used it must be connected to GND; if floating the deviceis disabled.
internal D-MOS.
in an output voltage of 3.3V for the L4973V3.3 and 5.1V. An external resistive divider is required for higher outputvoltages. Foroutput voltage less than 3.3V, seenote ** and Figure 32.
Pin 1 and a capacitor connected from Pin 1 to ground fixes the switching frequency. (Line feed forward is automatically obtained)
-1
-5
V V
V V
V V
V V
5
W W
2
W
3/16
L4973V3.3 - L4973V5.1 - L4973D3.3 - L4973D5.1
ELECTRICAL CHARACTERISTICS
R
OSC = 20K
; unless otherwisespecified)•= specificationsreferredto TJfrom0 to 125°C.
( Referto the test circuit,V
= 24V; Tj=25°C, COSC = 2.7nF;
CC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
DYNAMIC CHARACTERISTICS
Input Voltage Range (*)
Output Voltage L4973V5.1
Output Voltage L4973V3.3
R
DSON
Maximum Limiting Current V
η Efficiency V
Switching Frequency Supply Voltage Ripple
Rejection
Switching Frequency Stability
f
sw
vs, Supply Voltage
VO=V I
= 1A 5.05 5.1 5.15 V
O
I
=0.5Ato3.5A 5.00 5.1 5.20 V
O
V
CC
I
= 1A 3.326 3.36 3.393 V
O
I
=0.5Ato3.5A 3.292 3.36 3.427 V
O
V
CC
VCC= 10.5V 0.15 0.22 I
=3.5A
O
CC = 8V to55V O
V
O
V
i =VCC +2VRMS
VO=V VCC= 8V to 55V 2 5 %
to 40V; I
REF
= 8V to 55V
=3.5A 855V
O
4.95 5.1 5.25 V
= 8V to 40V 3.26 3.36 3.46 V
4 4.5 5.5 A
0.35
= 5.1V; IO=3.5A 90 % = 3.3V; IO=3.5A 85 %
90 100 110 KHz 60 dB
;IO=1A; f
ref
ripple
= 100Hz
REFERENCESECTION
Reference Voltage 5.025 5.1 5.175 V
I
Line Regulation I
Load Regulation V
= 0 to 20mA;
ref
V
= 8 to 55V
CC
= 0mA;
ref
V
= 8 to 55V
CC
= 0 to 5mA;
ref
V
= 0 to 20mA
CC
4.950 5.1 5.250 V
510mV
2 6
10 25
Short Circuit Current 30 65 100 mA
SOFT START
Soft Start Charge Current 30 45 60 µA Soft Start Discharge Current 15 22 30 µA
mV mV
INHIBIT
High Level Voltage Low Level Voltage I
source High Level V
I
source Low Level V
DC CHARACTERISTICS
Total Operating Quiescent Current
Quiescent Current Duty Cycle= 0 2.7 4 mA Total stand-by quiescent
current
ERROR AMPLIFIER
High Level Output Voltage 11.0 V Low Level Output Voltage 0.65 V Source Bias Current 1 2 3 µA Source Output Current 200 300 600 µA
4/16
3.0 V
INH INH
=3V = 0.8V
10 16 50 µA
10 15 50 µA
0.8 V
Duty Cycle= 50% 4 6 mA
V
CC = 24V; V
V
CC = 55V; V
= 5V 100 200 µA
INH
= 5V 150 300 µA
INH
ELECTRICAL CHARACTERISTICS (continued)
Sink Output Current 200 300 µA Supply Voltage Ripple
Rejection
VCOMP = VFB C
=4.7µF 1-5mA load
REF
current DC Open Loop Gain R Transconductance I
L = 50 60 dB
= -0.1 to 0.1mA;
comp
V
=6V
comp
OSCILLATORSECTION
Ramp valley 0.78 0.85 0.92 V Ramp peak V
CC = 8V 1.9 2.1 2.3 V
V
CC = 55V 9 9.6 10.2 V
Maximum Duty Cycle 95 97 % Maximum Frequency Duty Cycle= 0%; R
13K;C
OSC
SYNC FUNCTION
High Input Voltage VCC= 8V to55V 3.5 V Low Input Voltage V Slave Sink Current 0.15 0.25 0.45 mA Master Output Amplitude I Output Pulse Width no load, V
= 8V to55V 0.9 V
CC
= 3mA 4 4.5 V
source
L4973V3 - L4973V5 - L4973D3- L4973D5
60 80 dB
2.5 mS
=
OSC
= 820pF;
= 4.5V 0.20 0.35 µs
sync
500 KHz
(*) Pulse testingwith a low dutycycle. (**) The maximum power dissipation of thepackage must be observed.
Figure1. EvaluationBoard Circuit
V
CC
C1 C2R2C7
C3 C4 C5
C1=1000µF/63V C2=220nF/63V C3=470nF C4=1µF/50V C5=220pF C6=22nF C7=2.7nF C8=220nF/63V C0=100µF/40V(C9,C10,C11) C12=Optional (220nF) L1=150µHK R1=9.1K R2=20K D1=GI SB560
77310 - 40Turns - 0.9mm
OOLµ
7,8
1 17
16
(DIP18)
L4973
11
10
13,14,15
R1 C6
(V) R3(K) R4(K)
V
O
3.3
5.1 12 15 18 24
12
4,5,6
2,3
D97IN515B
L4973 V3.3
0
2.7 12 16 20 30
9
C8
D1
L1
3
x
C0
C12
V
R3
R4
O
L4973 V5.1
VO(V) R3(K) R4(K)
4.7
4.7
4.7
4.7
4.7
5.1 12 15 18 24
6.2
9.1 12 18
0
4.7
4.7
4.7
4.7
5/16
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