5.1 to 40V.
Realized with BCD mixed technology, the device
uses a DMOS output transistorto obtain very high
efficiencyandveryfastswitchingtimes.Featuresof
L4972AD
2A SWITCHINGREGULATOR
MULTIPO WER BCD TECHNOLO GY
POWERD IP
(16 + 2 + 2)
ORDERING NUMBERS : L4972A(Powerdip)
L4972AD (SO20)
the L4972A include reset and power fail for microprocessors,feed forward line regulation,soft start,
limitingcurrent and thermalprotection. The device
ismountedina Powerdip16+2+2and SO20large
plasticpackagesand requiresfew externalcomponents. Efficient operation at switching frequencies
up to 200KHzallowsreduction in the size and cost
of externalfiltercomponent.
SO20
BLOCK DIAGRAM
June 2000
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/23
L4972A-L4972AD
ABSOLU TE MAX IMUM RATINGS
SymbolParameterValu eUnit
V
V
V
I
V
4,V8
V
V
2,V7,V9,V10
P
T
J,Tstg
(*) SO-20
11
11
20
20
V
I
3
I
3
I
2
I
7
I
8
tot
InputVoltage55V
InputOperatingVoltage50V
OutputDC Voltage
OutputPeak Voltageat t = 0.1µs f = 200khz
-1
-5
Maximum Output CurrentInternally Limited
BoostrapVoltage
BoostrapOperating Voltage
65
V
+15
11
InputVoltage at Pins4, 1212V
Reset Output Voltage50V
Reset Output Sink Current50mA
InputVoltage at Pin 2, 7, 9, 107V
Reset Delay Sink Current30mA
ErrorAmplifier Output Sink Current1A
Soft Start Sink Current30mA
TotalPower Dissipation at T
9FEEDBACK INPUTThe Feedback Terminal of the Regulation Loop. The output is connecteddirectly to
10SYNC INPUTMultiple L4972A’s are synchronized by connecting pin 10 inputs together or via an
11SUPPLYVOLTAGEUnregulated InputVoltage.
12,19 N.C.Not Connected.
13V
14V
ref
start
17OSCILLATORR
18OSCILLATORC
20OUTPUTRegulator Output.
NameFunction
capacitor connected between this terminal and the output allows to drive
boot
properlythe internalD-MOS transistor.
capacitor connected between this terminal and ground determines the reset
d
signaldelay time.
and theoutput voltages are safe.
tothe inputforpowerfailfunction.It mustbe connectedto thepin 14 an external30K
resistorwhen power fail signal not required.
A series RC network connected between this terminal and ground determines the
regulation loop gain characteristics.
to define the soft start time constant.
thisterminal for5.1V operation; It is connected via a dividerfor higher voltages.
externalsyncr. pulse.
5.1VV
DeviceReferenceVoltage.
ref
InternalStart-up Circuit to Drive the PowerStage.
. Externalresistorconnected to grounddeterminestheconstantchargingcurrent
osc
of C
.
osc
. External capacitor connected to ground determines (with R
osc
frequency.
) the switching
osc
Ω
3/23
L4972A-L4972AD
CIRCU I T OP ER ATION
The L4972Ais a 2A monolithicstepdownswitching
regulatorworkingincontinuousmoderealizedinthe
new BCD Technology.This technologyallows the
integrationofisolatedverticalDMOSpowertransistors plusmixedCMOS/Bipolartransistors.
The device candeliver 2A at an outputvoltage adjustable from 5.1V to 40V and contains diagnostic
and control functionsthat make it particularly suitable for microprocessorbased systems.
BLOCKDIAGRAM
The block diagram shows theDMOSpowertran-
sistorsand the PWM control loop.Integratedfunctions include a reference voltage trimmed to 5.1V
±2%,softstart,undervoltagelockout,oscillatorwith
feedforward control, pulse by pulse current limit,
thermal shutdown and finally the reset and power
fail circuit.The reset and power failcircuit provides
an outputsignalfora microprocessorindicatingthe
statusof the system.
Deviceturn on is around11V witha typical1Vhysterysis,thisthresholdporvidesa correctvoltagefor
the driving stageof the DMOS gateand the hysterysispreventsinstabilities.
Anexternalbootstrapcapacitorchargeto 12Vbyan
internalvoltagereferenceis neededto providecorrect gatedriveto the powerDMOS.Thedrivingcircuit is able to source and sink peak currents of
around0.5A to the gate of the DMOStransistor.A
typical switching time of the current in the DMOS
transistor is 50ns. Due to the fast commutation
switchingfrequenciesup to 200kHzare possible.
The PWMcontrolloop consistsof a sawtoothoscillator,erroramplifier,comparator,latch andthe outputstage.An errorsignalis producedbycomparing
theoutputvoltagewiththeprecise5.1V± 2%onchip
reference.This error signal is then comparedwith
the sawtooth oscillator in order to generate frixed
frequencypulsewidth modulateddrive for the output stage. A PWM latch is included to eliminate
multiple pulsingwithin a period even in noisy environments.
Thegainand stabilityoftheloopcanbe adjustedby
an externalRC networkconnectedto the outputof
the error amplifier. A voltage feedforward control
has beenaddedto the oscillator,this maintainssuperior line regulation over a wide input voltage
range.Closingthe loopdirectlygivesan outputvoltageof 5.1V,highervoltagesareobtainedbyinserting a voltagedivider.
Atturnon,outputovercurrentsarepreventedbythe
soft start function (fig. 2). The error amplifier is initiallyclampedbyan externalcapacitor,Css,and allowedto riselinearlyunderthe chargeof aninternal
constantcurrentsource.
Outputoverloadprotectionis providedby a current
limitcircuit. Theloadcurrentis sensedby a internal
metalresistorconnectedtoa comparator.Whenthe
loadcurrentexceedsa presetthreshold,the output
of the comparatorsetsa flipflop whichturns offthe
powerDMOS.Thenextclockpulse,fromaninternal
40kHzoscillator,willresettheflipflopandthepower
DMOS will again conduct. This current protection
method,ensuresaconstantcurrentoutputwhenthe
systemis overloadedorshortcircuitedandlimitsthe
switchingfrequency,inthiscondition,to40kHz.The
Reset and Power fail circuit (fig. 4), generatesan
output signal when the supply voltage exceeds a
threshold programmed by an external voltage divider. The reset signal, is generated with a delay
timeprogrammedbya externalcapacitoronthedelay pin. When the supply voltage falls below the
thresholdor the output voltagegoes below 5V, the
resetoutputgoeslowimmediately.Theresetoutput
is an opendrain.
Fig. 4A shows thecasewhen the supplyvoltageis
higherthan the threshold,but the output voltage is
not yet 5V.
Fig.4Bshowsthecasewhentheoutputis 5.1V,but
the supply voltage is not yet higherthan the fixed
threshold.
The thermal protection disables circuit operation
when the junction temperature reaches about
150°C and has a hysterysis to prevent unstable
conditions.
4/23
Figure1 : FeedforwardWaveform.
Figure2 : SoftStart Function.
L4972A-L4972AD
Figure3 : LimitingCurrentFunction.
5/23
L4972A-L4972AD
Figure4 : Resetand PowerFail Functions.
A
B
6/23
L4972A-L4972AD
ELECTRICALCHARACTERISTICS (referto the test circuit,TJ=25°C, Vi=35V, R4= 30KΩ,