SGS Thomson Microelectronics HCF4046B Datasheet

MICROPOWER PHASE-LOCKED LOOP

.QUIESCENT CURRENT SPECIFIED TO 20V

FOR HCC DEVICE

.VERY LOW POWER CONSUMPTION : 100µW

(TYP.) AT VCO fo= 10kHz, VDD=5V

.OPERATING FREQUENCY RANGE : UP TO

1.4MHz(TYP.) AT VDD=10V

.LOWFREQUENCYDRIFT : 0.06%/°C (typ.)AT

VDD=10V

.CHOICE OF TWO PHASE COMPARATORS :

1) EXCLUSIVE - OR NETWORK

2)EDGE-CONTROLLEDMEMORY NETWORK
WITH PHASE-PULSE OUTPUT FORLOCK IN­DICATION

.HIGH VCO LINEARITY: 1%(TYP.)

.VCO INHIBIT CONTROL FOR ON-OFF KE-

YING AND ULTRA-LOW STANDBY POWER
CONSUMPTION

.SOURCE-FOLLOWER OUTPUT OF VCO

CONTROL INPUT(demod. output)

.ZENERDIODETO ASSIST SUPPLY REGULA-

TION

.5V, 10V AND 15V PARAMETRIC RATING

.INPUT CURRENTOF100nAAT18V AND 25°C

FOR HCC DEVICE

.100% TESTEDFOR QUIESCENTCURRENT

.MEETSALLREQUIREMENTSOFJEDECTEN-

TATIVE STANDARD N°. 13A, ”STANDARD
SPECIFICATIONSFOR DESCRIPTIONOF ”B”
SERIESCMOS DEVICES”

HCC/HCF4046B

EY

(Plastic Package)

C1

(ChipCarrier)

ORDERCODES :

HCC4046BF HCF4046BEY

PIN CON NEC TIONS

F

(CeramicPackage)

HCF4043BC1

DESCRIPTION
TheHCC4046B(extended temperature range) and

HCF4046B (intermediate temperature range) are

monolithic integrated circuits, available in 16-lead
dual in-line plastic or ceramic package. The
HCC/HCF4046B COS/MOS Micropower Phase­Locked Loop (PLL) consists of a low-power, linear
voltage-controlled oscillator(VCO)andtwodifferent
phase comparators having a common signal-input
amplifier and a common comparator input. A 5.2V
zener diode is provided for supply regulation if
necessary.

June 1989

1/13

HCC/HCF4046B

VCO Section

The VCO requires one external capacitor C1 and
one ortwoexternal resistors(R1or R1andR2).Re­sistorR1 andcapacitorC1 determine the frequency
range of the VCO andresistor R2 enablestheVCO
tohavea frequencyoffsetif required.The highinput
impedance(10

12Ω

)oftheVCOsimplifiersthedesign
of low-pass filters by permitting the designer a wide
choice of resistor-to-capacitor ratios. In order not to
loadthelow-passfilter,asource-followeroutputofthe
VCO input voltage is provided at terminal 10 (DE­MODULATED OUTPUT). If this terminal is used, a
load resistor (RS)of10kΩor more should be con-
nectedfromthisterminalto VSS. Ifunused this termi­nal shouldbeleftopen. TheVCOcanbeconnected
either directly or through frequency dividers to the
comparator input of the phase comparators. A full
COS/MOSlogicswingis availableattheoutputofthe
VCO and allows direct coupling to COS/MOS fre­quency dividers such as the HCC/HCF4024B,

HCC/HCF4018B, HCC/HCF4020B,
HCC/HCF4022B, HCC/HCF4029B,and
HBC/HBF4059A. One or more HCC/HCF4018B

(Presettable Divide-by-N Counter) or HCC/HCF4029B
(Presettable Up/Down Counter), or HBC/HBF4059A
(Programmable Divide-by-”N” Counter), together
withtheHCC/HCF4046B(Phase-Locked Loop)can
be used to build a micropowerlow-frequency syn­thesizer.Alogic0 on theINHIBITinput”enables” the
VCO and the source follower, whilea logic 1 ”turns
off” both to minimize stand-bypower consumption.

Phase Comparators

The phase-comparator signal input (terminal 14)
can be direct-coupled provided the signal swing is
within COS/MOS logic levels [logic ”0” ≤ 30 %
(VDD–VSS), logic ”1” ≥ 70 % (VDD-VSS)]. For
smaller swings the signal must be capacitively
coupled to the self-biasing amplifier at the signal
input. Phase comparator I is an exclusive-OR net­work;it operates analagously to an over-driven bal­anced mixer. To maximize the lock range, the
signal-and comparator-input frequencies musthave
a 50% dutycycle.With nosignal ornoiseon the sig­nal input, this phase comparator has an average
output voltage equal to VDD/2. The low-pass filter
connected to the outputof phase comparator I sup­plies the averaged voltage to the VCO input, and
causes the VCO to oscillate at thecenter frequency
(fo). The frequency range of input signals on which
the PLLwilllockifitwas initiallyoutof lock isdefined
asthefrequencycapturerange(2fc).Thefrequency
range of input signals on which the loop will stay
lockedif it was initially in lock is defined as the fre­quencylockrange (2 fL). The capturerange is≤ the

lock range. With phase comparator I the range of
frequencies over which the PLL can acquire lock
(capture range) is dependent on the low-pass-filter
characteristics, and can be made as large as the
lockrange.Phase-comparator I enablesaPLL sys­tem to remain in lock in spite of high amounts of
noise in the input signal. One characteristic of this
type of phase comparator is that it may lock onto
input frequencies that are close to harmonics of the
VCO center-frequency. A second characteristic is
that the phase angle between the signal and the
comparator input varies between 0° and 180°, and
is 90° at the center frequency. Fig. (a) shows the
typical, triangular, phase-to-output response char­acteristicofphase-comparator I.Typical waveforms
for a COS/MOS phase-locked-loop employing
phasecomparatorIinlockedconditionoffoisshown
infig.(b).Phase-comparator II isanedge-controlled
digital memory network. It consists of four flip-flop
stages,control gating, and a three-stage output-cir­cuitcomprising p- and n-type drivers having a com­mon output node. When the p-MOS or n-MOS
driversareONtheypulltheoutputuptoVDDordown
to VSS, respectively.Thistype of phase comparator
acts only on the positive edges of the signal and
comparator inputs. The dutycyclesofthesignaland
comparator inputs are not important since positive
transitionscontrol the PLL systemutilizing thistype
ofcomparator.Ifthe signal-input frequency ishigher
than the comparator-input frequency, the p-type
outputdriverismaintainedONmostofthe time,and
both the n- and p-driversOFF (3 state)the remain­der of the time.If the signal-input frequency is lower
than the comparator-input frequency, the n-type
outputdriverismaintainedONmostofthe time,and
both the n- and p-driversOFF (3 state)the remain­der of the time. If the signal and comparator-input
frequencies are the same, but the signalinput lags
the comparator input in phase, the n-type output
driver is maintained ONfor a time corresponding to
the phase difference. If the signal and comparator­inputfrequencies are thesame, but the comparator
input lags the signal in phase, the p-type output
driver is maintained ONfor a time corresponding to
the phase difference. Subsequently, the capacitor
voltageofthe low-passfilterconnected tothisphase
comparator is adjusted until the signal and com­parator inputs are equal in both phase and fre­quency. Atthisstablepoint bothp-andn-type output
drivers remainOFFand thusthe phasecomparator
outputbecomes an open circuitand holds the volt­age on the capacitor of the low-pass filter constant.
Moreover the signal at the ”phase pulses” output is
ahighlevelwhichcanbe usedforindicatinga locked
condition. Thus, for phase comparator II, no phase
difference exists between signal and comparator

2/13

HCC/HCF4046B

inputover the full VCO frequencyrange. Moreover,
the powerdissipation dueto thelow-passfilter is re­duced when thistype of phase comparator is used
because both the p- and n-type output drivers are
OFF for most of the signal input cycle. It should be
notedthat the PLL lock range for this type of phase

Figure a : Phase-Comparator I Characteristics at

Low-Pass Filter Output.

comparator is equal to the capture range, inde­pendent ofthelow-pass filter.Withnosignalpresent
at the signal input,the VCO is adjustedto itslowest
frequency for phase comparator II. Fig. (c) shows
typical waveforms for a COS/MOSPLL employing
phasecomparator II in a locked condition.

Figureb :TypicalWaveformsfor COS/MOSPhase

Locked-Loop Employing Phase Com­parator I in Locked Condition of f

o.

Figure C : Typical Waveforms For COS/MOS Phase-locked Loop Employing Phase Comparator II In

LockedCondition.

3/13

HCC/HCF4046B

FUN CTIONAL DI AGRAM

V

DD

S-2299

ALL INPUTS ARE PROTECTED BY
COS/MOS PROTECTION NETWORK

V

SS

ABSOLUTE M AXI MU M RATINGS

Symbol Parameter Val ue Unit

V

* Supply Voltage : HCC Types

DD

HCF Types

V

Input Voltage – 0.5 to VDD+ 0.5 V

i

DC Input Current (any one input) ± 10 mA

I

I

P

Total Power Dissipation (per package)

tot

– 0.5 to + 20
– 0.5 to + 18

200

V
V

mW
Dissipation per Output Transistor
for T

T

T

Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltage values are referred to VSSpin voltage.

Operating Temperature : HCC Types

op

Storage Temperature – 65 to + 150 °C

stg

= Full Package-temperature Range

op

HCF Types

100

–55to+125

–40to+85

mW

°C
°C

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Value Unit

V

T

Supply Voltage :HCC Types

DD

HCF Types

V

Input Voltage 0 to V

I

Operating Temperature : HCC Types

op

HCF Types

3to18
3to15

DD

– 55 to + 125

–40to+85

V
V

V

°C
°C

4/13

HCC/HCF4046B

STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)

Test Conditions Value

V

Symbol Parameter

V

I

O

|IO|V

(V) (V) (µA) (V)

VCO SECTION

OH

Output High

V

Voltage

V

OL

Output Low
Voltage

OH

Output
Drive
Current

HCC
Types

I

0/ 5
0/10
0/15

5/0
10/0
15/0

<1
<1
<1

<1
<1
<1

5
10
15

5
10
15

0/ 5 2.5 5 – 2 – 1 .6 – 3.2 – 1.15
0/ 5 4.6 5 – 0.64 – 0.51 – 1 – 0.36
0/10 9.5 10 – 1.6 – 1.3 – 2.6 – 0.9
0/15 13.5 15 – 4.2 – 3.4 – 6.8 – 2.4
0/ 5 2.5 5 – 1.53 – 1.36 – 3.2 – 1.1

HCF
Types

0/ 5 4.6 5 – 0.52 – 0.44 – 1 – 0.36
0/10 9.5 10 – 1.3 – 1.1 – 2.6 – 0.9
0/15 13.5 15 – 3.6 – 3.0 – 6.8 – 2.4

I

OL

I

IH,IIL

Output
Sink
Current

Input
Leakage
Current

HCC
Types

HCF
Types

HCC
Types

HCF
Types

0/ 5 0.4 5 0.64 0.51 1 0.36
0/10 0.5 10 1.6 1.3 2.6 0.9
0/15 1.5 15 4.2 3.4 6.8 2.4
0/ 5 0.4 5 0.52 0.44 1 0.36
0/10 0.5 10 1.3 1.1 2.6 0.9
0/15 1.5 15 3.6 3.0 6.8 2.4

0/18

18 ± 0.1 ± 10

Any Input

0/15

15 ± 0.3 ± 10

PHASE COMPARATOR SECTION

I

DD

Total Device
Current
Pin 14 =Open
Pin 5 = V

Pin
or V
Pin 5 = V

14 =V

DD

DD
SS

DD

HCC
Types

0/ 5
0/10
0/15
0/20

5
10
15
20

0/ 5 5 5 0.04 5 150
0/10 10 10 0.04 10 300
0/15 15 20 0.04 20 600
0/20 20 100 0.08 100 3000

HCF
Types

OH

Output
Drive
Current

HCC
Types

I

0/ 5 5 20 0.04 20 150
0/10 10 40 0.04 40 300
0/15 15 80 0.04 80 600
0/ 5 2.5 5 – 2 – 1.6 – 3.2 – 1.15
0/ 5 4.6 5 – 0.64 – 0.51 – 1 – 0.36
0/10 9.5 10 – 1.6 – 1.3 – 2.6 – 0.9
0/15 13.5 15 – 4.2 – 3.4 – 6.8 – 2.4
0/ 5 2.5 5 – 1.53 – 1.36 – 3.2 – 1.1

HCF

Types

0/ 5 4.6 5 – 0.52 – 0.44 – 1 – 0.36
0/10 9.5 10 – 1.3 – 1.1 – 2.6 – 0.9
0/15 13.5 15 – 3.6 – 3.0 – 6.8 – 2.4

*T

=–55°C for HCC device : – 40°CforHCF device.

Low

*T

= + 125°C for HCC device : +85°CforHCF device.

High

TheNoise Margin for both ”1” and”0” level is : 1V min. with VDD= 5V, 2V min. with VDD= 10V, 2.5V min. withVDD= 15V.

T

DD

* 25°CT

Low

Min. M ax. Min. Typ. M a x. Mi n . Ma x .

4.95

9.95

14.95

0.05

0.05

0.05

0.1

0.5

1.5
4

4.95

9.95

14.95

5
10
15

0.05

0.05

0.05

–5

± 0.1 ± 1

–5

± 0.3 ± 1

0.05

0.1

0.25

0.5

0.75

1.5

2

4

4.95

9.95

14.95

High

*

0.05

0.05

0.05

0.1

0.5

1.5
4

Unit

V

mA

µA

mA

µA

mA

5/13

HCC/HCF4046B

STATIC ELECTRICAL CHARACTERISTICS (continued)

Test Conditions Value

T

V

Symbol Parameter

I

OL

Output
Sink
Current

HCC
Types

HCF
Types

IH

Input High

V

Voltage

V

I

(V) (V) (µA) (V)

0/ 5 0.4 5 0.64 0.51 1 0.36
0/10 0.5 10 1.6 1.3 2.6 0.9
0/15 1.5 15 4.2 3.4 6.8 2.4
0/ 5 0.4 5 0.52 0.44 1 0.36
0/10 0.5 10 1.3 1.1 2.6 0.9
0/15 1.5 15 3.6 3.0 6.8 2.4

0.5/4.5 < 1 5 3.5 3.5 3.5

|IO|V

O

DD

Min. M ax. Min. Typ. M a x. Mi n . Ma x .

1/9 < 1 10 7 7 7

1.5/13.5 < 1 15 11 11 11

IL

Input Low

V

Voltage

4.5/0.5 < 1 5 1.5 1.5 1.5
9/1 < 1 10 3 3 3

13.5/1.5 < 1 15 4 4 4

I

IH,IIL

I

OUT

*T

Low

*T

High

TheNoise Marginfor both ”1” and”0” levelis : 1V min. with VDD= 5V, 2V min.with VDD= 10V, 2.5Vmin. with VDD= 15V.

Input
Leakage
Current
(except.
pin 14)

3-state
Leakage
Current

Input Capacitance Any Input 5 7.5 pF

C

I

=–55°Cfor HCC device: – 40°CforHCF device.
= + 125°C for HCC device : +85°CforHCF device.

HCC
Types

HCF
Types

HCC
Types

HCF
Types

0/18

18 ± 0.1 ± 10

Any Input

0/15

15 ± 0.3 ± 10

0/18 0/18 18 ± 0.4 ± 10

0/15 0/15 15 ± 1.0 ± 10

* 25°CT

Low

–5

± 0.1 ± 1

–5

± 0.3 ± 1

–4

± 0.4 ± 12

–4

± 1.0 ± 7.5

High

*

Unit

mA

V

V

µA

µA

6/13

HCC/HCF4046B

ELECTRI CA L CARA CTERISTICS (T

Symbol Parameter

VCO SECTION

P

Operating Power

D

Dissipation

f

Maximum Frequency R1 = 10 KΩ C1 = 50 pF

max

Center Frequency (f
Frequency Range f

) and

o

max-fmin

Linearity V

Temperature Frequency
Stability (no frequency
offset) f

min

=0

Temperature Frequency
Stability (frequency offset)

≠ 0

f

min

V

t
t

Output Duty Cycle 5, 10, 15 50 %

CO

VCO Output Transition

THL

Time

TLH

Source Follower Output
(demodulated Output):
Offset Voltage V

COIN-VDEM

Source Follower Output
(demodulated Output):
Linearity

Zener Diode Voltage IZ=50µA 4.45 5.5 7.5 V

V

Z

R

Zener Dynamic Resistance IZ= 1 mA 40 Ω

Z

PHASE COMPARATOR SECTION

R14 Pin 14 (signal in) Input

Resistance

A.C. Coupled Signal Input
Voltage Sensitivity *
(peak to paek)

fo = 10 KHz R1 = 10 MΩ
R2 = ∞

R2 = ∞ V

R1 = 5 KΩ n C1 = 50 pF
R2 = ∞ V

COIN

V

COIN

V

COIN

V

COIN

V

COIN

R

S

R

S

R

S

f

in

=25oC)

amb

Test Conditions Value

V

(V) Min. Typ. Max.

DD

5 70 140

V

COIN

DD

=

2

10 800 1600
15 3000 6000

V

5 0.3 0.6

COIN=VDD

10 0.6 1.2
15 0.8 1.6

5 0.5 0.8

COIN=VDD

10 1 1.4
15 1.4 2.4

Programmable with external components R1, R2 and C1

± 0.3

=2.5V
=5V
=5V
=7.5V
=7.5V

R1=10 KΩ 5 1.7

± 1

R1=100 KΩ 10 0.5

± 2.5

R1=400 KΩ 10 4

± 1.5

R1=100 KΩ 15 0.5

± 5

R1=1 MΩ 15 7

5 ±0.12
10 ±0.04
15 ±0.015

5 ±0.09
10 ±0.07
15 ±0.03

5 100 200
10 50 100
15 40 80

RS>10KΩ 5, 10, 15 1.8 2.5 V

=100 KΩ V
=300 KΩ V
=500 KΩ V

COIN
COIN
COIN

±0.3

=2.5

V 5 0.3

±2.5

=5

V 10 0.7

=7.5±5V 15 0.9

512
10 0.2 0.4
15 0.1 0.2

= 100 KHz sine wave 5 180 360

10 330 660
15 900 1800

Unit

µW

MHz

%

o

%/

C

ns

%

MΩ

mV

7/13

HCC/HCF4046B

ELECTRICAL CHARACTERISTICS (continued)

Symbol Parameter

Test Conditions Value

PHASE COMPARATOR SECTION (cont’d)

T

PHL

Propagation Delay Time High to
Low Level Pins 14 to 13

T

PL H

Propagation Delay Time Low to
High, Level

T

PHZ

Propagation Delay Time 3-state
High Level to High Impedance
Pins 14 to 13

T

t

PL Z

r,tf

Low Level to High Impedance 5 285 570

Input Rise or Fall Time
Comparator Pin 3

Signal Pin 14 5 500

T

,

THL

T

TLH

* For sine wave the frequency must be greater than 10KHZfor Phase Comparator II.

Transition Time 5 100 200

V

(V) Min. Typ . Max.

DD

Unit

5 225 450

10 100 200

ns

15 65 130

5350700

10 150 300

ns

15 100 200

5225450

10 100 200

ns

15 65 130

10 130 260

ns

15 95 190

550

10 1

µs

15 0.3

10 20

µs

15 2.5

10 50 100

ns

15 40 80

8/13

HCC/HCF4046B

DESIGN INFO RMATION

This information is a guide for approximating the valuesof external components fortheHCC/HCF 4046B in
a Phase-Locked-Loop system. The selected external components must be within the following ranges :

5kΩ ≤ R1, R2, RS≤ 1MΩ C1 ≥ 100pF at VDD≥ 5V C1 ≥ 50pF at VDD≥ 10V

USING PHASE COMPARATOR I USING PHASE COMPARATOR II

CHARACTERISTICS

VCO Frequency

VCO WITHOUT
OFFSET R2 = ∞

VCO WITH

OFFSET

VCO WITHOUT
OFFSET R2 = ∞

VCO WITH

OFFSET

For No Signal Input VCO in PLL System will Adjust to centre

Frequency Lock
Range, 2 f

L

frequency f

o

2fL= full VCO frequency range

2fL=f

VCO in PLL System will Adjust to Lowest
Operating Frequency f

max-fmin

Frequency Capture
Range, 2 f

C

Loop Filter
Component Selection

Phase Angle
Between Signal and

o

90

at Centre Frequency (fo), approximating

o

0

and 180oat ends of lock range (2 fL)

Comparator
Locks on Harmonics

Yes No

of Centre Frequency
Signal Input Noise

High Low

Rejection

* G.S. Mosckytz ”miniaturized RC filters using phase Lockedloop” BSTJ, may 1965

fC=f

Always 0

min

o

in lock

L

9/13

HCC/HCF4046B

Plastic DIP16 (0.25) MECHANICAL DATA

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

a1 0.51 0.020

B 0.77 1.65 0.030 0.065

b 0.5 0.020

b1 0.25 0.010

D 20 0.787
E 8.5 0.335

e 2.54 0.100

e3 17.78 0.700

F 7.1 0.280

I 5.1 0.201

L 3.3 0.130

Z 1.27 0.050

mm inch

10/13

P001C

Ceramic DIP16/1 MECHANICAL DATA

HCC/HCF4046B

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

A 20 0.787
B 7 0.276
D 3.3 0.130
E 0.38 0.015

e3 17.78 0.700

F 2.29 2.79 0.090 0.110
G 0.4 0.55 0.016 0.022
H 1.17 1.52 0.046 0.060

L 0.22 0.31 0.009 0.012

M 0.51 1.27 0.020 0.050

N 10.3 0.406

P 7.8 8.05 0.307 0.317
Q 5.08 0.200

mm inch

P053D

11/13

HCC/HCF4046B

PLCC20 MECHANICAL DATA

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

A 9.78 10.03 0.385 0.395

B 8.89 9.04 0.350 0.356
D 4.2 4.57 0.165 0.180

d1 2.54 0.100
d2 0.56 0.022

E 7.37 8.38 0.290 0.330

e 1.27 0.050

e3 5.08 0.200

F 0.38 0.015
G 0.101 0.004

M 1.27 0.050

M1 1.14 0.045

mm inch

12/13

P027A

HCC/HCF4046B

Information furnished is believed to be accurate and reliable.However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license isgranted by implication or otherwise under any patent orpatent rights ofSGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to changewithout notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproducts are not authorized foruse ascritical componentsin life support devices or systemswithout express
written approval of SGS-THOMSON Microelectonics.

 1994 SGS-THOMSON Microelectronics - All RightsReserved

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13/13