SGS Thomson Microelectronics HCF4034B Datasheet
8-STAGE STATICBIDIRECTIONAL PARALLEL/SERIAL
.BIDIRECTIONALPARALLEL DATA INPUT
.PARALLEL OR SERIAL INPUTS/PARALLEL
OUTPUTS
.ASYNCHRONOUS OR SYNCHRONOUSPAR-
ALLELDATA LOADING
.PARALLEL DATA-INPUT ENABLE ON ”A”
DATA LINES (3-state output)
.DATA RECIRCULATION FOR REGISTER EX-
PANSION
.MULTIPACKAGE REGISTEREXPANSION
.FULLY STATIC OPERATIONAL DC-TO-5MHz
(typ.)AT VDD=10V
.QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
.5V, 10V,AND 15VPARAMETRIC RATINGS
.INPUT CURRENTOF100nA AT18VAND25°C
FOR HCC DEVICE
.100% TESTEDFOR QUIESCENTCURRENT
.MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVESTANDARDN°13A,”STANDARDSPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIESCMOS DEVICES”
HCC/HCF4034B
INPUT/OUTPUT BUS REGISTER
EY
(Plastic Package)
HCC4034BF HCF4034BEY
PIN CO N NECTIONS
(Ceramic Frit Seal Package)
M1
(MicroPackage)
ORDER CODES :
HCF4034BM1
F
DESCRIPTION
TheHCC4034B(extended temperature range) and
HCF4034B (intermediate temperature range) are
monolithic integrated circuits, available in 24-lead
dual in-line plastic or ceramic package and plastic
micro package. The HCC/HCF4034B is a static
eight-stage parallel-or serial-input parallel-output
register. Itcan be used to : 1) bidirectionally transfer
parallel information between two buses ; 2) convert
serial data to parallel form and direct the parallel
datatoeitheroftwobuses ;3)store(recirculate)paralleldata,or4)acceptparallel datafromeitheroftwo
buses and convert that data to serial form. Inputs
that control the operations include a single-phase
CLOCK (CL), A DATA ENABLE (AE), ASYNCHRONOUS/SYNCHRONOUS(A/S), A-BUS-TOB-BUS/B-BUS-TO-A-BUS (A/B), and PARALLEL/
SERIAL (P/S). Data inputs include 16 bidirectional
parallel data lines of whichtheeightAdata linesare
inputs(3-stateoutputs) and the Bdatalinesare outputs (inputs) depending on the signal level on the
A/B input.In addition, an input for SERIAL DATAis
alsoprovided. AllregisterstagesareD-typemasterslaveflip-flops withseparatemasterandslaveclock
June 1989
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HCC/HCF4034B
inputs generated internally toallowsynchronous or
asynchronous data transfer from master to slave.
Isolationfrom externalnoise andthe effectsofloading isprovidedby outputbuffering.
PARALLELOPERATION – A high P/S input signal
allowsdata transfer intothe register via theparallel
data lines synchronously with thepositive transition
of the clockprovided the A/S input islow. If the A/S
inputishigh thetransfer is independent oftheclock.
The direction of data flow is controlled by the A/B
input. When this signal ishigh the A data lines are
inputs (andB data linesare outputs); alowA/Bsignal reverses thedirection ofdata flow.The AE-input
is an additional feature which allowsmanyregisters
tofeeddatatoacommonbus.TheADATAlinesare
FUNCTIONAL DIAGRAM
enabledonly whenthis signal is high. Datastorage
through recirculation of data in each register stage
is accomplished by making theA/B signalhigh and
the AE signallow.
SERIALOPERATION –AlowP/Ssignal allowsserial data to transfer into the register synchronously
withthe positivetransitionoftheclock.TheA/Sinput
isinternally disabledwhenthe register isin theserial
mode (asynchronous serial operation is not
allowed). The serial dataappears asoutputdataon
either the B lines (when A/B is high) or the A lines
(whenA/B islowandtheAEsignal ishigh).Register
expansion can beaccomplished by simply cascading HCC/HCF4034B packages.
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
* Supply Voltage : HCC Types
V
DD
V
Input Voltage – 0.5 to VDD+ 0.5 V
i
I
DC Input Current (any one input) ± 10 mA
I
P
T
T
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device
reliability.
2/16
Total Power Dissipation (per package)
tot
Dissipation per Output Transistor
for T
= Full Package-temperature Range
op
Operating Temperature : HCC Types
op
Storage Temperature – 65 to + 150 °C
stg
HCF Types
HCF Types
– 0.5 to + 20
– 0.5 to + 18
200
100
– 55 to + 125
–40to+85
V
V
mW
mW
°C
°C
HCC/HCF4034B
RECOMMENDED OPERATINGCONDITIONS
Symbol Parameter Value Unit
V
T
LOGIC DIAGRAMS
STEERING LOGIC
Supply Voltage : HCC Types
DD
HCF Types
V
Input Voltage 0 to V
I
Operating Temperature : HCC Types
op
HCF Types
3to18
3to15
DD
– 55 to + 125
–40to+85
V
V
V
°C
°C
3/16
HCC/HCF4034B
LOGIC DIAGRAM AND TRUTH TABLE
REGISTER STAGE (1 of 8 stages)
INPUTS OUT
▲
CL
M
▲ = LEVEL CHANGE
• = INVALID CONDI-
CL
▲
S
DQ
00
00
0•
X0
11
11
1•
FOR REGISTER INPUT-LEVELSAND RESULTING REGISTER OPERATION
”A”
Enable
0 0 0 X Serial Mode ; Synch. Serial Data Input, ”A” Parallel Data Outputs Disabled
0 0 1 X Serial Mode ; Synch. Serial Data Input, ”B” Parallel Data Output
0 1 0 0 Parallel Mode ; ”B” Synch. Parallel Data Inputs, ”A” Parallel Data Outputs
0 1 0 1 Parallel Mode ; ”B” Asynch. Parallel Data Inputs, ”A” Parallel Data Outputs
0 1 1 0 Parallel Mode ; ”A” Parallel Data Inputs Disabled, ”B” Parallel Data Outputs,
0 1 1 1 Parallel Mode ; ”A” Parallel Data Inputs Disabled, ”B” Parallel Data Outputs,
1 0 0 X Serial Mode ; Synch. Serial Data Input, ”A” Parallel Data Output
1 0 1 X Serial Mode ; Synch. Serial Data Input, ”B” Parallel Data Output
1 1 0 0 Parallel Mode ; ”B” Synch. Parallel Data Input, ”A” Parallel Data Output
1 1 0 1 Parallel Mode ; ”B” Asynch. Parallel Data Input, ”A” Parallel Data Output
1 1 1 0 Parallel Mode ; ”A” Synch. Parallel Data Input, ”B” Parallel Data Output
1 1 1 1 Parallel Mode ; ”A” Asynch. Parallel Data Input, ”B” Parallel Data Outpu
* Outputs change at positive transition of clock in the serial mode and when the A/S control inputs is ”low” in the parallel
mode.
4/16
P/S A/B A/S Operation*
Disabled
Disabled
Synch. Data Recirculation
Asynch. Data Recirculation
TIMING DIAGRAM
HCC/HCF4034B
5/16
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