TATIVESTANDARDN°13A,”STANDARDSPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIESCMOS DEVICES”
HCC/H CF4 02 6B
HCC/HCF4033B
7-SEGMENT DISPLAY OUTPUTS
EY
(Plastic Package)
M1
(Micro Package)
ORDER CODES:
HCC40XXBFHCF40XXBM1
HCF40XXBEYHCF40XXBC1
PIN CONN ECT IONS
(CeramicFrit Seal Package)
(Plastic Chip Carrier)
F
C1
DESCRIPTION
The HCC4026B/4033B (extended temperature
range) and HCF4026B/4033B (intermediate tem-
perature range) are monolithic integrated circuits,
available in 16-lead dual in-line plastic or ceramic
packageandplasticmicropackage.The
HCC/HCF4026B and HCC/HCF4033B each consist of a 5-stage Johnson decade counter and an
outputdecoder which convertsthe Johnsoncodeto
a 7-segment decoded output for driving one stage
in a numerical display. These devices are particularly advantageous in display applications where
lowpower dissipationand/or low packagecount are
important. Inputs common to both types are
CLOCK,RESET,& CLOCKINHIBIT; commonoutputs are CARRYOUT and the seven decoded outputs(a,b,c,d, e, f,g). Additional inputsandoutputs
fortheHCC/HCF4026B include DISPLAY ENABLE
input and DISPLAY ENABLE and UNGATED ”CSEGMENT” outputs. Signals peculiar to the
HCC/HCF4033B are RIPPLE-BLANKING INPUT
AND LAMP TEST INPUT and a RIPPLE-BLANKINGOUTPUT.A high RESET signal clears the de-
June1989
4026B
4033B
1/15
HCC/HCF4026B/4033B
cade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter
advancement viathe clocklineisinhibited whenthe
CLOCK INHIBIT signal is high. Antilock gating is
provided on the JOHNSON counter, thus assuring
propercounting sequence. The CARRY-OUT(C
out
signal completes one cycle every ten CLOCK
INPUT cycles and isused to clockthe succeeding
decade directly in a multi-decade counting chain.
The sevendecoded outputs (a,b, c,d,e, f, g) illuminate the proper segments in a sevensegment display device used for representing the decimal
numbers 0 to 9. The 7-segment outputs go high on
selection in the HCC/HCF4033B ; in the HCC/-HCF4026B these outputs go high only when the
DISPLAY ENABLEIN is high.
HCC/HCF4026B- Whenthe DISPLAYENABLE IN
is lowthe seven decoded outputs are forced low regardless of the state of thecounter. Activationof the
display only when required results in significant
power savings. This system also facilitates implementation of display-character multiplexing. The
CARRY OUT and UNGATED ”C-SEGMENT” signals are not gated by the DISPLAY ENABLE and
therefore are availablecontinuously. This feature is
a requirement in implementation of certain divider
functionssuch as divide-by-60 and divide-by-12.
HCC/HCF4033B-TheHCC/HCF4033B has provi-
sions for automatic blanking of the non-significant
zeros in amulti-digit decimal numberwhichresults
in an easily readable display consistent with
normal writing practice. For example, the number
0050.07000 in an eight digit display would be displayed as 50.07. Zero suppression on the integer
side is obtained by connecting the RBI terminal of
the HCC/HCF4033B associated with the most significantdigit in thedisplay to alow-level voltageand
)
connectingtheRBOterminal ofthatstagetotheRBI
terminal of the HCC/HCF4033B in the next-lower
significant position in the display. This procedure is
continued foreach succeedingHCC/HCF4033Bon
the integer side of thedisplay. On thefractionside
of the display the RBIof the HCC/HCF4033B asso-
ciatedwiththe leastsignificant bitis connected to a
low-level voltage and the RBO of that HCC/-
HCF4033B is connected to the RBI terminal of the
HCC/HCF4033B inthenext more-significant-bit po-
sition. Again, this procedure is continued for all
HCC/HCF4033B’s on the fraction side of the display.In a purely fractionalnumberthezero immediately preceding the decimal point can be displayed
by connecting the RBI of that stageto a high level
voltage(instead of tothe RBO of thenextmore-significant-stage). For example : optional zero →
0.7346. Likewise, the zero in a number such as
763.0canbedisplayedbyconnecting the RBI ofthe
HCC/HCF4033B associated with it to a high-level
voltage. Ripple blanking of non-significant zeros
provides an appreciable savings in display power.
The HCC/HCF4033B has a LAMP TEST input
which, when connected to a high-level voltage,
overrides normal decoder operation and enables a
checkto be made on possible displaymalfunctions
by putting the sevenoutputsin thehigh state.
2/15
FUN CTIONAL DIAGR A MS
HCC/HCF4026B/4033B
4026B
4033B
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
*Supply Voltage :HCC Types
V
DD
HCF Types
V
Input Voltage– 0.5 to VDD+ 0.5V
i
I
DC Input Current (any one input)± 10mA
I
P
Total Power Dissipation (per package)
tot
Dissipation per Output Transistor
for T
= Full Package-temperature Range
op
T
Operating Temperature : HCC Types
op
HCF Types
T
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device
reliability.
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronicsassumes no responsability for the
consequences of use of such information nor for any infringementofpatents orother rights of third parties which may results from its use. No
license isgranted by implication orotherwise underany patentor patent rights ofSGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to changewithout notice.This publication supersedes andreplaces all information previously supplied.
SGS-THOMSON Microelectronicsproductsare notauthorized foruse ascritical componentsinlife supportdevices orsystemswithout express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics - All RightsReserved
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -