64-STAGE STATICSHIFT REGISTER
.FULLY STATIC OPERATION : DC to 16MHz
(TYP.) @ VDD–VSS=15V
.STANDARD TTL DRIVE CAPABILITY ON Q
OUTPUT
.RECIRCULATION CAPABILITY
.THREECASCADINGMODES:
DIRECT CLOCKING FOR HIGH-SPEED
OPERATION
DELAYEDCLOCKINGFORREDUCEDCLOCK
DRIVE REQUIREMENTS
ADDITIONAL1/2 STAGEFOR SLOW CLOCKS
.QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
.STANDARDIZED, SYMMETRICAL OUTPUT
CHARACTERISTICS
.5V, 10V,AND 15VPARAMETRIC RATINGS
.INPUT CURRENT OF 100nAat 18V AND 25°C
FOR HCC DEVICE
.100% TESTEDFOR QUIESCENTCURRENT
.MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVE STANDARD NO. 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTIONOF ”B”
SERIESCMOS DEVICES”
HCC/HCF4031B
EY
(Plastic Package)
C1
(ChipCarrier)
ORDERCODES :
HCC4031BF HCF4031BEY
PIN C O N NECTION S
F
(CeramicPackage)
HCF4031BC1
DESCRIPTION
TheHCC4031B(extended temperature range) and
HCF4031B (intermediate temperature range) are
monolithic integrated circuits, available in 16-lead
dual in-line plastic orceramic package.
The HCC/HCF4031B is a static shift register that
contains 64 D-type, master-slave flip-flop stages
andonestagewhichisaD-type masterflip-floponly
(referred to as a 1/2 stage).The logiclevel present
at the DATA input is transferred into the first stage
and shifted one stage at each positive-going clock
transition. Maximum clock frequencies up to 16
Megahertz(typical) can beobtained. Because fully
static operation is allowed, information can be permanentlystored withthe clock linein either thelow
or high state. The HCC/HCF4031B has a MODE
CONTROLinput that,whenin thehighstate,allows
operation in the recirculating mode. The MODE
CONTROLinputcanalsobeusedtoselectbetween
two separate data sources.Register packages can
be cascaded and the clock lines driven directly for
high-speed operation. Alternatively, adelayedclock
output(CLD)isprovided thatenables cascading reg-
June 1989
1/12
HCC/HCF4031B
ister packages while allowing reduced clock drive
fan-out and transition-time requirements. A third
cascading option makes use of the Q’ output from
the 1/2 stage, which is available on the next nega-
FUNCTIONAL DIAGRAM
tive-going transition of the clock after the Q output
occurs. This delayed output, like the delayed clock
CLD, is used with clocks having slow rise and fall
times.
ABSOLUTE M AXI MUM RATINGS
Symbol Parameter Value Unit
V
* Supply Voltage :HC C Types
DD
HCF Types
V
Input Voltage – 0.5 to VDD+ 0.5 V
I
I
DC Input Current (any one input) ± 10 mA
I
P
Total Power Dissipation (per package)
tot
– 0.5 to + 20
– 0.5 to + 18
200
V
V
mW
Dissipation per Output Transistor
for T
T
T
Stresses abovethoselisted under”Absolute MaximumRatings” may causepermanent damageto thedevice.This is a stress rating only and
functionaloperation ofthe deviceattheseor anyotherconditions abovethose indicatedin theoperationalsections ofthis specificationisnotimplied.
Exposureto absolutemaximum ratingconditions for externalperiodsmayaffect device reliability.
* Allvoltage valuesare referredto VSSpinvoltage.
Operating Temperature : HCC Types
op
Storage Temperature – 65 to + 150 °C
stg
= Full Package-temperature Range
op
HCF Types
100
– 55 to + 125
–40to+85
mW
°C
°C
RECOMMENDED OPERATING CONDITIONS
Symbol Paramet e r Valu e Unit
V
Supply Voltage : HCC Types
DD
HCF Types
V
Input Voltage 0 to V
I
T
Operating Temperature : HCC Types
op
HCF Types
3to+18
3to+15
DD
– 55 to + 125
–40to+85
V
V
V
°C
°C
2/12
LOGIC DIAGRAM AND TRUTH TABLES
HCC/HCF4031B
IN P U T CONTRO L CIRCUIT
Da ta Recirc. Mod e
1X01
0X00
X111
X010
TYPICA L STAGE
Data CL Data + 1
0
1
X
1 = HIGHLEVEL 0 = LOW LEVEL NC = NO CHANGE
–
/
–
–
/
–
–
\
–
Bit Into
Stage 1
0
1
NC
X = DON’T CARE
OUTPUT FROM Q’ (pin 5)
Data + 6 4 CL Data + 64.5
0
1
X
–
\
–
–
\
–
–
/
–
0
1
NC
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HCC/HCF4031B
STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)
Test Conditions Valu e
Symbol Parameter
(V) (V) (µA) (V)
I
L
Quiescent
Current
HCC
Types
0/ 5 5 5 0.04 5 150
0/10 10 10 0.04 10 300
0/15 15 20 0.04 20 600
0/20 20 100 0.08 100 3000
HCF
Types
OH
Output High
V
Voltage
0/ 5 5 20 0.04 20 150
0/10 10 40 0.04 40 300
0/15 15 80 0.04 80 600
0/ 5
0/10
0/15
V
OL
Output Low
Voltage
5/0
10/0
15/0
V
IH
Input High
Voltage
IL
Input Low
V
Voltage
I
OH
Output
Source
Current
(Source)
Q, Q, Q
CL
D
HCC
Types
HCF
Types
0/ 5 2.5 5 – 2 – 1.6 – 3.2 – 1.15
0/ 5 4.6 5 – 0.64 – 0.51 – 1 – 0.36
0/10 9.5 10 – 1.6 – 1.3 – 2.6 – 0.9
0/15 13.5 15 – 4.2 – 3.4 – 6.8 – 2.4
0/ 5 2.5 5 – 1.53 – 1.36 – 3.2 – 1.1
0/ 5 4.6 5 – 0.52 – 0.44 – 1 – 0.36
0/10 9.5 10 – 1.3 – 1.1 – 2.6 – 0.9
0/15 13.5 15 – 3.6 – 3.0 – 6.8 – 2.4
OL
Output
Sink
Current Q
HCC
Types
I
HCF
Types
OL
Output
Sink
Current
HCC
Types
I
Q, Q’
CL
D
HCF
Types
I
IH,IIL
Input
Leakage
Current
HCC
Types
HCF
Types
Input Capacitance Any Input 5 7.5 pF
C
I
*T
=–55°Cfor HCC device : – 40°C forHCF device.
Low
*T
= + 125°CforHCCdevice : + 85°C for HCF device.
High
TheNoiseMarginforboth ”1” and ”0” level is : 1Vmin. withVDD= 5V, 2V min. withVDD=10V, 2.5 Vmin.with VDD= 15V.
0/ 5 0.4 5 2.56 2.04 4 1.44
0/10 0.5 10 6.4 5.2 10.4 3.6
0/15 1.5 15 16.8 13.6 27.2 9.6
0/ 5 0.4 5 2.08 1.74 4 1.43
0/10 0.5 10 5.01 4.42 10.4 3.74
0/15 1.5 15 13.6 11.56 27.2 9.52
0/ 5 0.4 5 0.64 0.51 1 0.36
0/10 0.5 10 1.6 1.3 2.6 0.9
0/15 1.5 15 4.2 3.4 6.8 2.4
0/ 5 0.4 5 0.52 0.44 1 0.36
0/10 0.5 10 1.3 1.1 2.6 0.9
0/15 1.5 15 3.6 3.0 6.8 2.4
0/18
0/15
V
I
V
O
0.5/4.5
1/9
1.5/13.5
4.5/0.5
9/1
13.5/1.5
Any Input
|IO|V
DD
T
Low
Min. M ax. Min. Typ. Max. Min. Max.
<1
5
4.95
<1
10
9.95
<1
15
14.95
<1
<1
<1
<1
<1
<1
<1
<1
<1
5
10
15
5
10
15
5
10
15
0.05
0.05
0.05
3.5
7
11
1.5
18 ± 0.1 ±10
15 ± 0.3 ±10
* 25°CT
4.95
9.95
14.95
High
4.95
9.95
14.95
0.05
0.05
0.05
3.5
7
11
3.5
7
11
1.5
3
4
3
4
–5
± 0.1 ± 1
–5
± 0.3 ± 1
*
0.05
0.05
0.05
1.5
3
4
Unit
µA
V
V
V
V
mA
mA
mA
µA
4/12