SYNCHRONOUSHIGH SPEED OUTPUT RESPONSE OR RIPPLE CLOCKING FOR SLOW
CLOCKINPUT RISE AND FALL TIMES
.”PRESET ENABLE” AND INDIVIDUAL ”JAM”
INPUTSPROVIDED
.BINARY OR DECADE UP/DOWNCOUNTING
.BCD OUTPUTSIN DECADEMODE
.STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
.5V, 10V, AND 15V PARAMETRIC RATINGS
.INPUT CURRENTOF 100nA AT 18VAND 25°C
FOR HCC DEVICE
.QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
.100% TESTEDFOR QUIESCENTCURRENT
.MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVE STANDARD No. 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTIONOF ”B”
SERIESCMOS DEVICES”
HCC4029B
HCF4029B
BINARY ORBCD DECADE
EY
(PlasticPackage)
M1
(MicroPackage)
ORDER CODES :
HCC4 029BFHCF4029BM1
HCF4029BEYHCF4029BC1
(CeramicPackage)
F
C1
(Chip Carrier)
DESCRIPTION
TheHCC4029B (extended temperature range) and
HCF4029B (intermediate temperature range) are
monolithic integrated circuit, available in 16-lead
dual in-line plastic or ceramic package and plastic
micro package.The HCC/HCF4029B consistsof a
four-stage binary or BCD-decade up/downcounter
withprovisions forlook-aheadcarryin bothcounting
modes. The inputs consist of a single CLOCK,
CARRY-IN(CLOCK ENABLE), BINARY/DECADE,
UP/DOWN, PRESET ENABLE, and four individual
JAM signals. Q1, Q2, Q3, Q4 and a CARRY OUT
signalareprovided asoutputs. AhighPRESETENABLEsignal allowsinformationon theJAMINPUTS
to preset the counter to any state asynchronously
with the clock. A low on each JAM line, when the
PRESET-ENABLE signal ishigh,resetsthecounter
toitszerocount. Thecounterisadvancedonecount
at the positive transition of the clock when the
CARRY-INand PRESET ENABLE signals, arelow.
Advancement is inhibited when the CARRY-IN or
PRESET ENABLE signals are high. The CARRYOUT signal is normallyhigh and goes lowwhen the
PIN CONNECTIONS
NC = No Internal Connection
September 1988
1/13
HCC/HCF4029B
counter reachesitsmaximumcount inthe UPmode
or the minimumcountinthe DOWN modeprovided
the CARRY-INsignal is low. The CARRY-IN signal
in the low state can thus be considered a CLOCK
ENABLE. The CARRY-IN terminal must be connectedtoVSSwhennot inuse.Binarycountingisaccomplished when the BINARY/DECADE input is
high ; thecounter counts in thedecade mode when
the BINARY/DECADE input is low. The counter
FUN CTIONAL DI AGR A M
counts Up when to UP/DOWN INPUT is high, and
Down when the UP/DOWN INPUT is low. Multiple
packages can be connected in either a parallelclockingor a ripple-clockingarrangement as shown
in cascading counter packages. Parallel clocking
provides synchronous control and hence faster response from all counting outputs. Ripple-clocking
allowsforlonger clock input rise and fall times.
ABSOLU TE MAXI MU M RAT ING
SymbolParameterValueUnit
V
*Supply Voltage: HCC Types
DD
V
P
T
T
Stressesabove those listedunder”AbsoluteMaximum Ratings”maycausepermanent damagetothedevice.Thisisastressratingonlyand functional
operation of the device at these or any otherconditions above thoseindicated in theoperational sections of thisspecificationisnotimplied.Exposure
to absolute maximum ratingconditionsforexternal periods mayaffect device reliability.
Allvoltage values are referredtoVSSpinvoltage.
Input Voltage-0.5 to VDD+ 0.5V
i
DC Input Current (any one input)± 10mA
I
I
Total Power Dissipation (per package)
tot
Dissipation per Output Transistor
for Top = Full Package Temperature Range
Operating Temperature: HCC Types
op
Storage Temperature-65 to +150
stg
HCF Types
HCF Types
-0.5 to +20
-0.5 to +18
200
100
-55 to +125
-40 to +85
V
V
mW
mW
o
C
o
C
o
C
2/13
HCC/HCF4029B
RECO MM ENDED OPERAT IN G C ONDITIO NS
SymbolParameterValueUnit
V
V
T
LOGIC DI AGRAMS
Supply Voltage: HCC Types
DD
HCF Types
Input Voltage0 to V
I
Operating Temperature: HCC Types
op
HCF Types
3to18
3to15
DD
-55 to +125
-40 to +85
V
V
V
o
C
o
C
TRUTH TABLES
CLOCKTEPEJQQ
XXOOOI
OIXQ Q
XXOIIO
IIXQQNC
XIXQQNC
X DON’TCARE
Control InputLogic LevelAction
BIN/DEC
(B/D)
UP/DOWN
(U/D)
Preset Enable
(PE)
I
O
I
O
I
O
Binary Count
Decade Count
Up Count
Down Count
Jam In
No Jam
No Counter
I
Carry In (Cl)
Advance at Pos.
Clock Transition
(Clock Enable)
Advance Counter
O
at Pos. Clock
Transition
3/13
HCC/HCF4029B
TIM ING DIAGRAMS
Binary Mode
Decade Mode
4/13
HCC/HCF4029B
STATI C ELECT RIC AL CHA R ACTE R ISTI CS (over rec ommended o p er ating conditio ns)
TheNoiseMarginfor both ”1” and”0”level is: 1V min. withVDD=5V,2 V min.withVDD=10V,2.5 V min. withVDD=15V
Input CapacitanceAny Input57.5pF
I
=-55oCforHCC device: -40oC for HCF device.
=+125oCforHCC device:+85oC for HCF device.
HCC
Types
HCF
Types
0/18
18±0.1±10
Any Input
0/1515±0.3±10
-5
±0.1±1
-5
±0.3±1
HIGH
Unit
*
µA
V
V
V
V
mA
mA
µA
5/13
HCC/HCF4029B
DYNAMIC ELECTRICAL CHARACTERISTICS (T
=25oC, CL=50pF,RL= 200 KΩ,
amb
typic al t emper at ure coeff ic ent for al l VDDvalues is 03 %/oC, all input rise and f al l times = 20 ns )
SymbolParameter
t
t
t
t
t
t
t
r,tf
t
setup
t
setup
f
PLH
PHL
PLH
PHL
TLH
THL
t
max
Propagation Delay Time (Q Outputs)5250500
Propagation Delay Time (Carry Output)5280560
Transition Time (Q Outputs, Carry Output)5100200
Minimum Clock Pulse Width590180
W
**Clock Rise and Fall Time515
*Minimum Setup Time (Carry Input)53060
Minimum Setup Time (B/D or UD)5170340
Maximum Clock Input Frequency524
PRESET ENABLE
Propagation Delay Time (Q Outputs)5235470
Propagation Delay Time (Carry Output)5320640
Minimum Preset Enable (Pulse Width)565130
W
*Minimum Preset Enable (Removal Time)5100200
t
t
t
t
t
rem
PLH
PHL
PLH
PHL
t
CARRY INPUT
t
PHL
t
PLH
t
setup
t
hold
* FromUp/Down, Binary/Decade, Carry In orPreset Enable ControlInputs toClock Edge
** If more than oneunit is cascated in theparallel clocked application tr should be made less than or equalto the sumof the fixed propagation
delayat 15pF and the transition time of the carry output drivingstageforthe estimated capacitance load.
*** FromCarryin toClockEdge.
Propagation Delay Time (Carry Output)5170340
***Minimum Setup Time (Carry In)52550
Minimum Hold Time (Carry In)5100200
Test ConditionsValue
V
(V) Min.Typ.Max.
DD
10120240
1590180
10130260
1595190
1050100
154080
104590
153060
1015
1515
101020
15612
1070140
1550100
1048
155.511
10100200
1580160
10145290
15105210
103570
152550
1055110
154080
1070140
1550100
101530
151225
103570
153060
Unit
ns
ns
ns
ns
µs
ns
MHz
ns
ns
ns
ns
ns
6/13
HCC/HCF4029B
TypicalOutput Low (sink)Current Characteristics.MinimumOutput Low(sink) Current Charac-
TypicalOutput High (source) Current Characteristics.
Minimum Output High (source) Current Characteristics.
7/13
HCC/HCF4029B
APPLICATIONS
Conversion of Clockup, ClockDown Input Signals to Clock and Up/DownInputsSignals.
Cascading Counter Packages.
The HCC/HCF4029B CLOCK and UP/DOWN in-
puts are useddirectly in mostapplications. In applications where CLOCK UP and CLOCK DOWN
inputsareprovided,conversiontothe
HCC/HCF4029B CLOCK and UP/DOWN inputs
can easily be realized by use of the circuit.
HCC/HCF4029Bchanges count on positivetransitions of CLOCK UP or CLOCK DOWN inputs. For
the gate configuration shown below, whencounting
up the CLOCK DOWN input must be maintained
high and conversely when counting down the
CLOCKUP inputmust bemaintained high.
* CARRY-OUT lines at the 2nd, 3rd, et., stages may have a negative-going glitch pulse resulting from differential delays of different
HCC/HCF4029B IC’s.Thesenegative-going glitchesdo notaffect proper HCC/HCF4029B operation. However, if the CARRY-OUTsignals
are usedtotriggerotheredge-sensitive logicdevices, such as FF’sorcounters, the CARRY-OUTsignalsshouldbe gatedwiththe clocksignal
usinga 2-input NOR gate suchas HCC/HCF4001B.
RippleClockingMode : The Up/Downcontrolcan be changed at any count. Theonly restrictionon changing the Up/Down control is thatthe
clock inputto thefirstcounting stage must be high.
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability forthe
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted byimplication orotherwise underany patentor patentrights of SGS-THOMSON Microelectronics.Specificationsmentioned
in this publication aresubject to changewithout notice. Thispublication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproducts are not authorized foruse ascritical componentsinlifesupportdevices orsystemswithoutexpress
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All RightsReserved
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