SGS Thomson Microelectronics HCF40194B, HCF40104B Datasheet

HCC/HCF40104B HCC/H CF4 01 94B
4-BIT BIDIRECTIONALUNIVERSALSHIFT REGISTER
. MEDIUM-SPEED OPERATION : f
(typ.)@ VDD=10V
CL
= 9MHz
.FULLYSTATICOPERATION
.SYNCHRONOUS PARALLEL OR SERIAL
OPERATION
.THREE-STATEOUTPUTS(HCC/HCF40104B)
.ASYNCHRONOUS MASTER RESET
(HCC/HCF40194B)
.STANDARDIZED, SYMMETRICAL OUTPUT
CHARACTERISTICS
.QUIESCENT CURRENTAT 20V FORHCC DE-
VICE
.5V, 10V, AND 15V PARAMETRIC RATINGS
.INPUT CURRENTOF 100nA AT18VAND 25°C
FOR HCC DEVICE
.100% TESTEDFOR QUIESCENTCURRENT
.MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVESTANDARDN°13A,”STANDARDSPE­CIFICATIONS FOR DESCRIPTION OF ”B” SERIESCMOS DEVICES”
DESCRI PTIO N
The HCC40104B, HCC40194B, (extended tem- perature range) and the HCC40104B, HCF40194B (intermediate temperature range) are monolithic in­tegrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro pack­age. TheHCC/HCF40104B isa universal shift reg- isterfeaturing parallel inputs, paralleloutputs,SHIFT RIGHTandSHIFTLEFTserialinputs,andahigh-im­pedance third output stateallowing the device to be usedin bus-organized systems. In the parallel-load mode (S0 and S1 are high), data is loaded into the associated flip-flop and appears at the output after the positive transition of the CLOCK input. During loading, serial data flow is inhibited. Shift-right and shift-left are accomplished synchronously on the positive clock edge with serial data entered at the SHIFT RIGHT and SHIFT LEFT serial inputs, re­spectively. Clearing the register is accomplished by settingbothmode controlslowand clocking thereg­ister.Whentheoutputenableinput islow,alloutputs assume the high impedance state. The HCC/HCF40194B is a universalshift register featur­ingparallel inputs,paralleloutputsSHIFTRIGHTand SHIFT LEFT serial inputs, and a direct overriding clear input.Inthe parallel-load mode (S0andS1 are high), data is loaded into theassociated flip-flop and
EY
(Plastic Package)
ORDER CODES :
HCC401XXBF HCF401XXBEY
PIN CONNECTIONS
40104B
40194B
(Ceramic Package)
F
C1
(Plastic Chip Carrier )
HCF401XXBC1
June 1989
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HCC/H CF40104B/40194B
appears at the output after the positive transition of the CLOCK input. During loading, serial data flow is inhibited. Shift right and shift left are accomplished synchronously on the positive clock edge with data enteredattheSHIFTRIGHTandSHIFT LEFTserial
FUN CTIONAL DIAGRAMS
40104B
ABSOLUTE MAXI MUM RATI NG S
inputs, respectively. Clocking of the register is in­hibitedwhenbothmodecontrolinputsarelow. When low,the RESET inputresetsallstagesand forces all outputs low. The HCC/HCF40194B is similar to in- dustrytypes 340194 and MC40194.
40194B
Symbol Paramet e r Val ue Unit
V
* Supply Voltage :HCC Types
DD
HCF Types
V
Input Voltage – 0.5 to VDD+ 0.5 V
i
I
DC Input Current (any one input) ± 10 mA
I
P
Total Power Dissipation (per package)
tot
– 0.5 to + 20 – 0.5 to + 18
200
V V
mW Dissipation per Output Transistor for Top= Full Package-temperature Range
T
Operating Temperature : HCC Types
op
HCF Types
T
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sec­tions of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
*
Allvoltagesvalues arereferredto VSSpinvoltage.
Storage Temperature – 65 to + 150 °C
stg
100
– 55 to + 125
–40to+85
mW
°C °C
RECO MME ND ED OPERATI NG C O N D IT I O N S
Symbol Paramet e r Val ue Unit
V
T
Supply Voltage : HCC Types
DD
HCF Types
V
Input Voltage 0 to V
I
Operating Temperature : HCC Types
op
HCF Types
3to18 3to15
DD
– 55 to + 125
–40to+85
V V
V
°C °C
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LOGIC DIAGRAMS
40104B
HCC/ HCF40104B/40194B
3/12
HCC/H CF40104B/40194B
LOGIC DIAGRAMS
40194B
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