SGS Thomson Microelectronics HCF40100B Datasheet
HCC/H CF4 01 00B
32-STAGESTATIC LEFT/RIGHTSHIFT REGISTER
.FULLYSTATIC OPERATION
.SHIFT LEFT/SHIFTRIGHT CAPABILITY
.MULTIPLEPACKAGE CASCADING
.RECIRCULATE CAPABILITY
.LIFO OR FIFO CAPABILITY
.STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
.QUIESCENT CURRENT SPECIFIED AT 20V
FOR HCC DEVICE
.5V, 10V,AND 15V PARAMETRIC RATINGS
.INPUT CURRENTOF100nA AT 18VAND25°C
FOR HCC DEVICE
.100% TESTEDFOR QUIESCENTCURRENT
.MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVE STANDARD No. 13A, ”STANDARD
SPECIFICATIONSFOR DESCRIPTIONOF ”B”
SERIESCMOS DEVICES”
DESCRIPTION
The HCC40100B (extended temperature range)
and HCF40100B (intermediate temperaturerange)
are monolithic integrated circuits, available in 16lead dual in-line plastic or ceramic package and
plastic micro package. The HCC/HCF40100B is a
32-stage shift registercontaining 32D-typemasterslave flip-flops. The data present at the SHIFTRIGHT INPUT is transferred into the first register
stagesynchronously withthepositive CLOCKedge,
provided the LEFT/RIGHT CONTROL is at a low
level, the RECIRCULATE CONTROL is at a high
level, and the CLOCK INHIBIT is low. If the
LEFT/RIGHT CONTROL is at a high level and the
RECIRCULATE CONTROLis also high, dataat the
SHIFT-LEFT INPUT istransferredintothe32ndregister stage synchronously with the positive CLOCK
transition, providedthe CLOCK INHIBITislow. The
state of the LEFT/RIGHT CONTROL, RECIRCULATE CONTROL, and CLOCKINHIBITshould not
bechangedwhentheCLOCKishigh. Dataisshifted
one stage left or one stage right depending on the
state of the LEFT/RIGHT CONTROL, synchronously with the positive CLOCKedge. Data clocked
intothefirstor32ndregister statesisavailable at the
SHIFT-LEFT or SHIFT-RIGHT OUTPUT respectively, on the next negative CLOCK transition (see
DataTransferTable).No shiftingoccursonthe positive CLOCK edge if the CLOCK INHIBITline is at a
highlevel.WiththeRECIRCULATE CONTROLlow,
data in the 32nd stage is shiftedinto the first stage
when the LEFT/RIGHTCONTROL islow and from
the 1st stage to the 32nd stage when the
LEFT/RIGHTCONTROL is high.
EY
(Plastic Package)
M1
(MicroPackage)
HCC40100BF HCF40100BM1
HCF40100BEY HCF40100BC1
PIN CONNECT I ONS
(Ceramic Frit Seal Package)
ORDER CODES :
(Plastic Chip Carrier)
F
C1
June 1989
1/13
HCC/HCF40100B
FUNCTIONAL DIAGRAM
ABSOLUTE MAX IMU M RATI NGS
Symbol Parameter Val ue Unit
V
* Supply Voltage : HCC Types
DD
HCF Types
V
Input Voltage – 0.5 to VDD+ 0.5 V
i
I
DC Input Current (any one input) ± 10 mA
I
P
Total Power Dissipation (per package)
tot
Dissipation per Output Transistor
for T
T
Operating Temperature : HCC Types
op
= Full Package-temperature Range
op
HCF Types
T
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device
reliability.
Storage Temperature – 65 to + 150 °C
stg
– 0.5 to + 20
– 0.5 to + 18
200
100
–55to+125
–40to+85
V
V
mW
mW
°C
°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
T
2/13
Supply Voltage : HC C Types
DD
HCF Types
V
Input Voltage 0 to V
I
Operating Temperature : HCC Types
op
HCF Types
3to+18
3to+15
DD
– 55 to + 125
–40to+85
V
V
V
°C
°C
LOGIC DIAGRAM
HCC/HCF40100B
3/13
HCC/HCF40100B
TRUTH TABLES
CONTROL
Left/Right Control
Clock
Inhibit
Recirculate
Control
Action Input Bit Origin
1 0 1 Shift Left Shift Left Input
1 0 0 Shift Left Stage 1
0 0 1 Shift Right Shift Right Input
0 0 0 Shift Right Stage 32
X 1 X No Shift –
DATA TRANSFER
Ini t i al State Clock Resulting State
Data Input Clock Inhibit Internal Stage Level Change
00X
X00
10X
X01
–
/
–
–
\
–
–
/
–
–
\
–
X 1 1 X NC NC
0 = Low level 1 = High level X= Don’t Care. NC = No change.
* For Shift-Right Mode For Shift-left Mode
Data Input = SHIFT-RIGHT INPUT (Pin 11) Data input = SHIFT LEFT INPUT (Pin 6)
Internal Stage = Stage 1 (Q1) Internal Stage = Stage 32 (Q32)
Output = SHIFT-LEFT OUTPUT (Pin 4). Output = SHIFT-RIGHT OUTPUT (Pin 12).
Internal
Stag e Q
Output
0NC
NC 0
1NC
NC 1
STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)
Test Conditions Valu e
Symbol P arameter
I
Quiescent
L
Current
HCC
Types
HCF
Types
V
OH
Output High
Voltage
V
OL
Output Low
Voltage
*T
=–55°CforHCC device : – 40°C for HCF device.
Low
*T
= + 125°CforHCC device : + 85°CforHCF device.
High
TheNoise Margin for both”1” and ”0” level is : 1V min.with VDD= 5V,2V min. with VDD= 10V, 2.5 Vmin. with VDD=15V.
V
V
O
|IO|V
I
(V) (V) (µA) (V)
T
DD
* 25°CT
Low
Min. Max. Min. Typ. Max. Min. Max.
High
0/ 5 5 5 0.04 5 150
0/10 10 10 0.04 10 300
0/15 15 20 0.04 20 600
0/20 20 100 0.08 100 3000
0/ 5 5 20 0.04 20 150
0/10 10 40 0.04 40 300
0/15 15 80 0.04 80 600
0/ 5 < 1 5 4.95 4.95 4.95
0/10 < 1 10 9.95 9.95 9.95
0/15 < 1 15 14.95 14.95 14.95
5/0 < 1 5 0.05 0.05 0.05
10/0 < 1 10 0.05 0.05 0.05
15/0 < 1 15 0.05 0.05 0.05
Unit
*
µA
V
V
4/13
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