SGS Thomson Microelectronics ESDALC6V1W5 Datasheet

®
ESDALC6V1W5
Application Specific Discretes
A.S.D.
MAIN APPLICATIONS
Where transient overvoltage protection in ESD sensitive equipment is required, such as :
Computers
Printers
Communication systems and cellular phones
Video equipment
Set top boxes
FEATURES
4 unidirectional TRANSIL™ functions.
ESD Protection: IEC61000-4-2 level 4
Breakdown voltage V
Low leakage current < 1µA @ 3 Volts
Low capacitance device
DESCRIPTION
The ESDALC6V1W5 is a 4-bit wide monolithic suppressor which is designed to protect component connected to data and transmission lines against ESD.
It clamps the voltage just above the logic level supply for positive transients, and to a diode drop below ground for negative transients.
= 6.1V min
BR
QUAD TRANSIL™ ARRAY
FOR ESD PROTECTION
SOT323-5L
FUNCTIONAL DIAGRAM
I/01
GND
I/02
I/04
I/03
BENEFITS
High ESD protection level : up to 25 kV.
Capacitance: 12pF @ 0V Typ.
High integration.
Suitable for high density boards.
COMPLIESWITH THE FOLLOWINGSTANDARDS :
IEC61000-4-2 level 4: 15 kV (air discharge)
8kV(contactdischarge)
MIL STD 883C-Method 3015-6 : class 3. (human body model) 25kV (HBM)
June 2002 - Ed: 4A
1/9
ESDALC6V1W5
ABSOLUTE MAXIMUM RATINGS (T
amb
= 25°C)
Symbol Parameter Test conditions Value Unit
V
PP
P
PP
T
j
T
stg
T
op
ELECTRICAL CHARACTERISTICS (T
ESD discharge - MIL STD 883E - Method 3015-7
IEC61000-4-2 air discharge
IEC61000-4-2 contact discharge Peak pulse power (8/20 µs) Junction temperature Storage temperature range Operating temperature range
= 25°C)
amb
±25 ±15
±8 25 W
150 °C
-55to+150 °C
-40to+150 °C
Symbol Parameter
I
V
RM
V
BR
V
CL
Stand-off voltage Breakdown voltage
Clamping voltage
kV
I
RM
I
PP
C
Rd
Types VBR@I
ESDALC6V1W5
Note 1 : Square pulse Ipp = 15A, tp=2.5µs. Note 2 : VBR= αT* (Tamb -25°C) * VBR(25°C)
Leakage current Peak pulse current Capacitance per line Dynamic resistance
min. max. max. typ. max. typ. max.
VVmAµAVm
6.1 7.2 1 1 3 1100 6 7.5 9.5
R
V
V
CL
slope : 1 / R
IRM@V
RM
V
RM
BR
I
RM
I
R
d
Rd αTC C
note 1 note 2 3V bias 3V bias
10
I
PP
-4
/°C pF pF
V
2/9
ESDALC6V1W5
Fig. 1: Relative variation of peak pulse power
versus initial junction temperature.
Ppp[Tj initial] / Ppp [Tj initial = 25°C]
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0 0 25 50 75 100 125 150 175
Tj(°C)
Fig. 3: Junction capacitance versus reverse voltage
applied (typical values).
C(pF)
14
12
F=1MHz
Vosc=30mV
Tj=25°C
RMS
Fig. 2: Peak pulse power versusexponential pulse duration.
Ppp(W)
100
tp(µs)
10
1 10 100
Tj initial = 25°C
Fig. 4: Clamping voltage versus peak pulse cur­rent (maximum values, rectangular waveform).
Ipp(A)
100.0
10
8
6
4
2
0
012345
VR(V)
Fig. 5: Relative variation of leakage current versus
junction temperature (typical values).
IR [Tj] / IR [Tj=25°C]
100
10
1
25 50 75 100 125
Tj(°C)
10.0
1.0
Vcl(V)
0.1 0 102030405060
tp=2.5µs
Tj initial =25°C
Fig. 6: Application example
I/02
I/01
Connector
I/04
I/03
IC
to be
protected
3/9
Loading...
+ 6 hidden pages