ESDAxxSC5
®
ESDAxxSC6
Application Specific Discretes
A.S.D.™
APPLICATIONS
Where transient overvoltage protection in ESD
sensitive equipment is required, such as :
- Computers
- Printers
- Communication systems
- Cellular phone handsets and accessories
- Other telephone set
- Set top boxes
FEATURES
4 Unidirectional Transil™ Functions
■
Low leakage current: IRmax. < 20 µAatV
■
■ 500 W Peak pulse power (8/20 µs)
DESCRIPTION
The ESDAxxSC5 and ESDAxxSC6 are monolithic
voltage suppressors designed to protect
components which are connected to data and
transmission lines against ESD.
They clamp the voltage just above the logic level
supply for positive transients, and to a diode drop
below ground for negative transient.
BR
QUAD TRANSIL ARRAY
FOR ESD PROTECTION
SOT23-5L (SC-59)
ESDAxxSC5
FUNCTIONAL DIAGRAM
SOT23-5L
1
2
3
SOT23-6L (SC-59)
ESDAxxSC6
5
4
BENEFITS
High ESD protection level : up to 25 kV
High integration
Suitable for high density boards
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2 : level 4
15kV (air discharge)
8kV (contact discharge)
MIL STD 883E-Method 3015-7 : class3B
(human body model)
May 2002 Ed: 6F
SOT23-6L
1
2
3
6
5
4
1/9
ESDAxxSC5 / ESDAxxSC6
ABSOLUTE MAXIMUM RATINGS (T
amb
= 25°C)
Symbol Test conditions Value Unit
V
PP
ESD discharge - MIL STD 883E - Method 3015-7
25 kV
IEC61000-4-2 air discharge
IEC61000-4-2 contact discharge
P
PP
Peak pulse power (8/20µs) note1 ESDA5V3SCx
500 W
ESDA6V1SCx
ESDA14V2SCx
300 W
ESDA17SC6
ESDA19SC6
ESDA25SC6
T
j
T
stg
T
L
T
op
Junction temperature
Storage temperature range
Lead solder temperature (10 second duration)
Operating temperature range
ELECTRICAL CHARACTERISTICS (T
Symbol Parameter
V
V
V
I
I
αT
RM
BR
CL
RM
PP
Stand-off voltage
Breakdown voltage
Clamping voltage
Leakage current
Peak pulse current
Voltage temperature coefficient
amb
= 25°C)
I
I
F
V
BR
V
V
CL
RM
150 °C
-55 to +150 °C
260 °C
-40 to +125 °C
V
F
I
RM
V
2/9
C
Rd
V
Capacitance
Dynamic resistance
F
Forward voltage drop
Rd
I
PP
V
@IRIRM@V
BR
ESDAxxSC5 / ESDAxxSC6
Rd αTCV
RM
@I
F
F
Types
min. max. max. typ. max. typ. max.
VVmAµAVmΩ10
ESDA5V3SC5
5.3 5.9 1 2 3 230 5 280 1.25 200
ESDA5V3SC6
ESDA6V1SC5
6.1 7.2 1 20 5.25 350 6 190 1.25 200
ESDA6V1SC6
ESDA14V2SC5
14.2 15.8 1 5 12 650 10 100 1.25 200
ESDA14V2SC6
ESDA17SC6
ESDA19SC6
ESDA25SC6
note 1 : Square pulse, Ipp = 15A, tp=2.5µs.
note 2 : ∆ VBR= αT* (Tamb -25°C) * VBR(25°C)
17
19
19
21
1
0.075
1
0.1
25 30 1 1 24 1000 10 60 1.2 10
CALCULATION OF THE CLAMPING VOLTAGE
USE OF THE DYNAMIC RESISTANCE
The ESDA familyhasbeendesignedto clamp fast
spikes like ESD. Generally the PCB designers
need to calculate easily the clamping voltage V
CL
This is why we give the dynamic resistance in
addition to the classical parameters. The voltage
across the protection cell can be calculated with
the following formula:
VCL=VBR+RdI
PP
note 1 note 2 0V bias
-4
/°C pF V mA
14
15
700
800
10
8.5
85
80
1.2
1.2
As the value of the dynamic resistance remains
stable for a surge duration lower than 20µs, the
2.5µs rectangular surge is well adapted. In
.
addition both rise and fall times are optimized to
avoid any parasitic phenomenon during the
measurement of Rd.
10
10
WhereIpp is thepeakcurrent through theESDA cell.
DYNAMIC RESISTANCE MEASUREMENT
The short duration of the ESD has led us to prefer
amore adapted test wave, asbelow defined, to the
classical 8/20µs and 10/1000µs surges.
I
Ipp
2µs
tp = 2.5µs
s duration measurement wave.
2.5
t
3/9