SGS Thomson Microelectronics ASCOT Datasheet

1/8April 2000
COMPLETE CHIP SET FOR ADSL CPE
MODEM
COMPLIANCE WITH ANSI T1.413 ISSUE
1 & ISSUE 2
COMPLIANCE WITH G.992.1 (FULL RATE)
& G.992.2 (G. LITE)
(DMT) MODULATION AND DEMODULA­TION ON C P E S I DE
DATA RATES UP TO 8Mbps DOWNSTREAM
AND TO 1Mbps UPSTREAM WITH 32Kbps GRANULARITY
BUILT-IN ATM TRANSPORT
SUPPORT ADAPTIVE RATE MODE IN
32Mbps INCREMENTS
255/128 CARRIERS WITH 4.3125KHz
SPACING
DEDICATED SOFTWARE DRIVER A VAILABLE
PROCESSOR I NDE PENDEN T C++ S OURC E COMPILATION
FREQUENCY DIVISION MULTIPLEXING
(FDM) FOR HIGH ROBUSTNESS IN PRES­ENCE OF CROSSTALK
REED-SOLOMON FORWARD ERROR
CORRECTION
TRELLIS CODER AND DECODER
PROGRAMMABLE SIMULTANEOUS SUP-
PORT OF INTERLEAVED AND NON-INTER­LEAVED CHANNELS (DUAL LATENCY)
FULL, REDUCED AND MINIMAL ATM
OVERHEAD FRAMI N G MOD ES
BIT STREAM MODE CAPABLITY FOR STM
TRANSPORT
DIRECT CONNECTION TO ATM SYSTEMS
VIA UTOPIA IN TERFACE (LEVEL 1 OR 2)
MICROCONTROLLER INTERFACE WITH
16 BITS MULTIPLEXED ADDRESS/DATA BUS
LOW POWER TECHNOLOGY: 1.3w TOTAL
SINGLE 3.3V POWER SUPPLY
0 TO +70°C OPERATING TEMPERATURE
RANGE
APPLICATIONS
HIGH SPEED INTERNET ACCESS
WORK FOR TELECOMMUTERS AND BRANCH OFFICES
VIDEO-ON-DEMAND OVER TWISTED PAIR
CPE ADSL MODEMS, AND ROUTERS
ADSL PC NIC's
G. LITE CPE SPLITTERLESS APPLICA-
TIONS
TQFP64 PQFP144
ORDERING NUMBERS:
ST70134 (TQFP64)
ST70135A (PQFP144)
ST70134 - ST70135A
ASCOT ADSL MODEM CHIP SET FOR CPE
PRODUCT PREVIEW
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without noti ce.
ST70134 - ST70135A
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GENERAL DESCRIPTION
The ADSL modem chip set with ATM interface provides all the active functions required to build a complete ATM-based ADSL modem from line interface to ATM UTOPIA bus. The chip set employs Discrete MultiTone modulation as specified in ANSI T1.413.
The chip set operates at CPE end of the loop (ATU-R mode). Reed-Solomon forward error correction plus Trellis coding with or without interleaving in internal interleaving RAM p rovides maximum noise immunity (see Figure 3).
Interleaving is optional and can be used simultaneously on a slow channel (e.g., for data or control info) while a fast channel (e.g., video) operates without interleaving. ICs include rate adaptation capabilities during show time.
In transmit direction the chip set allows to select an attenuation of the signal in case of short loops or large echo (politeness). In rec eive d irection t he chip set can optionally control an external multiplexer to select an external attenuation of the signal in case o f short loops, and provide a 2-bit output ex ternal gain control.
ASCOT chip set
ASCOT is a two-chip ADSL modem transcei ver. STMicroelectronics provides the necessary software for transceiver’s external controller.
ASCOT can easily be hooked up with ATM systems through the built-in UTOPIA level 2/1 interface. That allows ATM traffic to be carried at up to 8Mbit/s downstream and 1Mbit/s upstrea m, over a very plain and widespread twisted pair.
ASCOT is intended for use at ATU-R end. The modem control sof tware can be compiled as
C++ code, independently on the processor used.
The driver can be interfaced to any external real time operating system.
These pages block diagrams show the main functions built-in in ST70134 and ST70135A.
ASCOT chip set supports three different rate adaptation modes: fixed rate adaptation mode, fixed with capability to boost within fixed range, dynamic rate adaptation during show time.
Modem’s performances are set by the following parameters: Rate adapta tion mode, Downstream and Upstream bit rate for both latency paths, Noise margins (min, max and target typically at 10E-7 BER without RS, interleaving and trellis), Maximum power spectral density for downstream, Maximum power for both up and downstream, Carrier mask (which tones are disabled), maximum interleaving delay.
Tones from number 8 to number 255 can be used: from 8 to 3 1 for upsteam s ignals and from 32 to 255 for downstream signals. Num bers 16 and 64 (96 for ADSL over ISDN) are dedicated to pilot tones which are employed for synchronisation purposes with ATU-C end. The software sets the use of tones for optimisation of performances.
Time recovery is carried out by the chip-set through the pilot tones. This activity is undertaken in two steps in order to achieve no more than 2ppm with AT U-C.
The transceiver controller sof tware monitors line and channel. As far as line is concerned noise margin, attenuation, power, carrier load, relative capacity occupation are checked.
Channel’s monitoring deals with cell-delineation, actual ATM (fast and interleaved) up and downstream rates.
Figure 1 : ADSL modem block configuration
DMT MODEM ST70135A
UTOPIA
µ CONTROL
MEMORY
AFE
ST70134
χ
χ
UTP
ST70134 - ST70135A
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ASCOT ICs
ASCOT consists of an Analog Front End (ST70134) and a Discrete Multitone Modem (ST70135A) integrated circuits which are produced by STMicroelectronics.
Here below we will briefly go through the main topics of both the ICs (see Figure 2 and Figure 3).
Analog Front End (ST70134)
HCMOS5A (0.5µm) mixed digital and analog technology has been chosen to produce this component that embodies the analog functions of the ASCOT.
Automatic gain control amplifiers, placed at the analog interface of transmit and receive paths, allow to keep acceptable level of the signal ADC’s and DAC’s resolution, that is 12-bit wide with
8.8MHz sampling rate. A built-in driver allows for external clock
generation using a VCXO.
ST70134 Analog Front End’s main features:
– Rx low noise amplifier (0-31dB in 1dB steps – Tx pre-driver amplifier (-15dB -0) – Two input ports allow selection of RX signals,
e.g. with or without external attenuation – Program m able low pass and band pass filters – 12 -bit DAC and ADC, sampling at 8.832MHz – Xtal: 35.328MHz, ±50ppm, the accuracy of t he
frequency is determined by the External XTAL – Direct connection to ST701 35A DMT modem – Error correction on ADC output – Anal og and digital loop back mo des – Single 3.3V supply, or 3.3V analog and 3.0V
digital supplies – Power dissipation 0.4W – Power-down mode 0.1W – TQFP64 (10 x 10mm body, 0.5mm pitch)
Figure 2 : Analog Front End block diagram
MUX
4
LPF
138KHz
G = -15...0dB
STEP 1dB
VCODAC XTAL DRIVER
TRANSMIT-SI D E
MUX
RECEIVE- SIDE
4
DAC
DAC
12 Bits / 8.8MHz
12 Bits / 8.8MHz
LPF
1.1MHz
LNA
G = 0...31dB STEP 1dB
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