Direct interface with the microcontroller for the
ACST4-7S (I
< 10mA)
GT
= +/-700V
=4A
T(RMS)
< 10 mA or 25mA
ACST4 Series
AC POWER SWITCH
OUT
DPAK
ACST4-7SB/CB
TO-220FPAB
ACST4-7SFP/CFP
FUNCTIONAL DIAGRAM
OUT
COM
G
OUT
COM
G
DESCRIPTION
The ACST4 belongs to the AC power switch family
built around the ASD™ technology. This high performance device is adapted to home appliances or
inductrial systems and drives loads up to 4 A.
The ACS™ switch embeds a Triac structure with a
high voltage clamping device to absorb the inductive turn-off energy and withstand line transients
suchasthosedescribedinthe IEC61000-4-5 standards.
January 2003 - Ed: 3A
COMG
1/9
ACST4 Series
ABSOLUTE RATINGS (limiting values)
For either positive or negative polarity of pin OUT voltage in respect to pin COM voltage
SymbolParameterValueUnit
V
DRM/VRRM
I
T(RMS)
I
TSM
2
I
tFusing capabilitytp = 10ms6.4A²s
dI/dtRepetitiveon-state current critical rate
V
PP
TstgStoragetemperature range- 40 to + 150°C
TjOperating junction temperature range- 30 to + 125°C
TlMaximum lead soldering temperature during 10s260°C
Note 1: according to test described by IEC61000-4-5 standard & Figure B.
GATE CHARACTERISTICS (maximum values)
SymbolParameterValueUnit
P
G (AV)
P
GM
I
GM
Repetitive peak off-state voltageTj = -10 °C700V
RMS on-state current full cycle sine
wave 50 to 60 Hz
Non repetitive surge peak on-state current
Tj initial = 25°C, full cycle sine wave
of rise I
= 10mA (tr < 100ns)
G
Non repetitive line peak pulse voltage
DPAKTc = 110 °C4A
TO-220FPABTc = 100 °C
F =50 Hz30A
F =60 Hz33A
Tj = 125°C
F = 120 Hz50A/µs
note 1
2kV
Average gate power dissipation0.1W
Peak gate power dissipation (tp = 20µs)10A
Peak gate current (tp = 20µs)1V
THERMAL RESISTANCES
SymbolParameterValueUnit
Rth (j-a)Junction to ambientS = 0.5cm²DPAK70°C/W
TO-220FPAB60°C/W
Rth (j-l)Junction to case for full cycle sine wave
conduction
S = Copper surface under Tab
DPAK2.6°C/W
TO-220FPAB4.6°C/W
2/9
PARAMETER DESCRIPTION
Parameter SymbolParameter description
ACST4 Series
I
GT
V
GT
V
GD
I
H
I
L
V
TM
V
TO
Triggering gate current
Triggering gate voltage
Non-triggering gate voltage
Holding current
Latching current
Peak on-state voltage drop
On state threshold voltage
RdOn state dynamic resistance
I
DRM/IRRM
Maximum forward or reverse leakage current
dV/dtCritical rate of rise of off-state voltage
(dV/dt)cCritical rate of rise of commutating off-state voltage
(dI/dt)cCritical rate of decrease of commutating on-state current
V
CL
I
CL
Clamping voltage
Clamping current
ELECTRICAL CHARACTERISTICS
For either positive or negative polarity of pin OUT voltage in respect to pin COM voltage.
SymbolTest ConditionsACST4-7SACST4-7CUnit
I
GT
V
GT
V
GD
I
H
I
L
V
TM
V
TO
RdTj=125°CMAX100mΩ
I
DRM
I
RRM
dV/dtV
(dI/dt)c(dV/dt)c = 15V/µsTj=125°CMIN2.02.5A/ms
V
CL
V
=12V (DC)
OUT
R
=33Ω
L
V
=12V (DC)
OUT
R
=33Ω
L
V
OUT=VDRMRL
I
= 100mA gate openTj=25°CMAX2035mA
OUT
QI - QII - QIIITj=25°CMAX1025mA
QI - QII - QIIITj=25°CMAX11.1V
=3.3kΩTj=125°CMIN0.2V
IG=2xIGtmaxTj=25°CMAX4060mA
I
= 5.6A tp=380µsTj=25°CMAX1.5V
OUT
Tj=125°CMAX0.90V
/
V
= 700VTj=25°CMAX10µA
OUT
Tj=125°CMAX500
=460V gate openTj=110°CMIN200500V/µs
OUT
ICL= 1mAtp=1msTj=25°CTYP1100V
3/9
ACST4 Series
AC LINE SWITCH BASIC APPLICATION
The ACST4 device has been designed to switch on & off low power, but highly inductive or resistive loads
such as dishwashers spray pumps, and air-conditioners fan.
Pin COM: Common drive reference to connect to the power line neutral
Pin G: Switch Gate input to connect to the digital controller
Pin OUT: Switch Output to connect to the load
ACST4-7S triggering current has to be sunk from the gate pin G.The switch can then be driven directly by
logic level circuits through a resistor as shown on the typical application diagram ( Fig A ).
Thanks to its thermal and turn off commutation performances, the ACST4 switch is able to drive with no
turn off additional snubber an inductive load up to 4 A.
TYPICAL APPLICATION DIAGRAM (Fig. A)
L
AC
MAINS
N
-Vcc
LOAD
L
R
OUT
COMG
M
OUT
ACST4
ST72 MCU
AC LINE TRANSIENT VOLTAGE RUGGEDNESS
TheACST4 switch is ableto sustain safely the ACline transient voltages eitherby clamping the low energy
spikes or by breaking over under high energy shocks, even with high turn-on current rises.
The test circuit of the figure 2 is representative of the final ACST application and is also used to stress the
ACST switch according to the IEC 61000-4-5 standard conditions. Thanks to the load, the ACST switch
sustainsthe voltage spikesup to 2kV above the peakline voltage. Itwill break oversafely even onresistive
load where the turn on current rate of rise, is as high as shownon figure 3. Such non-repetitive test can be
done 10 times on each AC line voltage polarity.
4/9
ACST4 Series
Fig. B: Overvoltage ruggedness test circuit for re-
sistiveandinductiveloadsaccordingto
IEC61000-4-5 standards.
R = 150Ω, L = 10µH, V
SURGEVOLTAGE
AC LINE & GENERATOR
PP
= 2kV.
R
V
+V
AC
L
OUT
ACST4
PP
COM
G
RG = 220Ω
Fig. C: Current and Voltage of the ACST4 dur-
ing IEC61000-4-5 standard test with R,L&V
PP
.
Fig. 1: Maximum power dissipation versus RMS
on-state current.
P(W)
5.0
α=180°
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.00.51.01.52.02.53.03.54.0
I(A)T(RMS)
180°
α
α
Fig. 2-1:RMS on-state current versus case
temperature.
I(A)T(RMS)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
α=180°
0.0
0255075100125
Tc(°C)
TO-220FPAB
DPAK
5/9
ACST4 Series
Fig. 2-2: RMS on-state current versus ambient
temperature.
I(A)T(RMS)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0255075100125
Tamb(°C)
α=180°
Printed circuitboard FR4
Natural convection
S=0.5cm²
Fig. 4: Relative variation of gate trigger current,
holding current and latching versus junction
temperature (typical values).
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