SGS Thomson Microelectronics 74VHCT74A Datasheet

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74VHCT74A

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

■ HIGHSPEED:

f

=160MHz(TYP.)atVCC=5V

MAX

■ LOW POWERDISSIPATION:

=2 µA (MAX.) at TA=25oC

I

CC

■ COMPATIBLEWITHTTL OUTPUTS:

V

=2V(MIN),VIL=0.8V(MAX)

IH

■ POWERDOWN PROTECTIONON INPUTS&

OUTPUTS

■ SYMMETRICALOUTPUTIMPEDANCE:

|I

|=IOL=8 mA (MIN)

OH

■ BALANCEDPROPAGATIONDELAYS:

t

≅ t

PLH

PHL

■ OPERATINGVOLTAGERANGE:

V

(OPR)= 4.5Vto 5.5V

CC

■ PINANDFUNCTIONCOMPATIBLEWITH

74SERIES74

■ IMPROVEDLATCH-UP IMMUNITY

DESCRIPTION

The 74VHCT74A is an advanced high-speed
CMOS DUAL D-TYPE FLIP FLOP WITH
PRESETAND CLEAR fabricatedwith sub-micron
silicon gate and double-layermetal wiring C

2

MOS

technology.
A signal on the D INPUT is transfered to the Q

OUTPUT during the positive going transition of

PACKAGE TUBE T & R

SOP 74VHCT74AM 74VHCT74AMTR

TSSOP 74VHCT74ATTR

the clock pulse.
CLEAR and PRESET are independent of the

clock and accomplished by a low setting on the
appropriateinput.

Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
devicecan be used to interface5V to 3V.

All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.

SOP TSSOP

ORDER CODES

PIN CONNECTIONAND IEC LOGIC SYMBOLS

March 2000

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74VHCT74A

INPUT EQUIVALENTCIRCUIT

PIN DESCRIPTION

PI N No SYM BO L NAM E AND FUNCTI O N

1, 13 1CLR,

2CLR

Asyncronous Reset -

Direct Input
2, 12 1D, 2D Data Input
3, 11 1CK, 2CK Clock Input

(LOW-to-HIGH, Edge-

Triggered)
4, 10 1PR, 2PR Asyncronous Set - Direct

Input

5, 9 1Q, 2Q True Flip-Flop Outputs
6, 8 1Q, 2Q Complement Flip-Flop

Outputs

7 GND Ground (0V)

14 V

CC

Positive Supply Voltage

TRUTH TABLE

INP U T S OUT P UTS FUNCTI ON

CLRPRDCKQ Q

L H X X L H CLEAR

H L X X H L PRESET

LLXXHH
HHL LH
HHH HL
HHX Q

X:Don’tCare

n

Q

n

NO CHANGE

LOGICDIAGRAM

Thislogic diagram has notbeused to estimate propagation delays

2/10

74VHCT74A

ABSOLUTE MAXIMUM RATINGS

Symb o l Para met er Value Unit

V

V
V
V

I
I

OK

I
or I

I

CC

T

T

AbsoluteMaximum Ratingsarethosevaluesbeyond whichdamagetothedevicemayoccur. Functionaloperationunder these condition isnotimplied.

1)V

=0

CC

2)HighorLowState

RECOMMENDEDOPERATINGCONDITIONS

Symb o l Para met er Value Unit

V

V
V
V
T

dt/dv

1)VCC=0

2)HighorLowState
from0.8Vto 2 V

3)V

IN

Supply Voltage -0.5 to +7.0 V

CC

DC Input Voltage -0.5 to +7.0 V

I

DC Output Voltage (see note 1) -0.5 to +7.0 V

O

DC Output Voltage (see note 2) -0.5 to VCC+ 0.5 V

O

DC Input Diode Current - 20 mA

IK

DC Output Diode Current
DC Output Current

O

DC VCCor Ground Current ± 50 mA

GND

Storage Temperature -65 to +150

stg

Lead Temperature (10 sec) 300

L

Supply Voltage 4.5 to 5.5 V

CC

Input Voltage 0 to 5.5 V

I

Output Voltage (see note 1) 0 to 5.5 V

O

Output Voltage (see note 2) 0 to V

O

Operating Temperature -40 to +85

op

Input Rise and Fall Time (see note 3) (V

=5.0±0.5V)

CC

20 mA

±

25 mA

±

CC

0 to 20 ns/V

o

C

o

C

V

o

C

DC SPECIFICATIONS

Symb o l Parameter Test C o n diti o ns Val u e Uni t

T

=25oC -40 t o 85oC

A

1.35 1.5 mA

µ

V

V

V

V

I

∆I

I

OPD

V

CC

High Level Input

IH

(V)

4.5 to 5.5 2 2 V

Min. Typ. Max. Min. Max.

Voltage
Low Level Input

IL

4.5 to 5.5 0.8 0.8 V

Voltage
High Level Output

OH

Voltage
Low Level Output

OL

Voltage
Input Leakage Current 0 to5.5 VI= 5.5V or GND ±0.1 ±1.0 µA

I

I

Quiescent Supply

CC

4.5 IO=-50 µA 4.4 4.5 4.4

4.5 I

=-8 mA 3.94 3.8

O

4.5 IO=50 µ A 0.0 0.1 0.1

4.5 I

=8 mA 0.36 0.44

O

5.5 VI=VCCorGND 2 20

Current
Additional Worst Case

CC

Supply Current

5.5 One Input at 3.4V,
other input at V

CC

or

GND

Output Leakage

0V

= 5.5V 0.5 5.0 µA

OUT

Current

V

V

A

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