OCTAL D-TYPE FLIP FLOP WITH CLEAR
■ HIGHSPEED:
f
=170MHz(TYP.)atVCC=5V
MAX
■ LOWPOWERDISSIPATION:
=4 µA (MAX.)at TA=25oC
I
CC
■ COMPATIBLEWITHTTL OUTPUTS:
V
=2V(MIN),VIL=0.8V(MAX)
IH
■ POWERDOWNPROTECTIONON INPUTS&
OUTPUTS
■ SYMMETRICALOUTPUTIMPEDANCE:
|I
|=IOL=8 mA(MIN)
OH
■ BALANCEDPROPAGATIONDELAYS:
t
≅ t
PLH
PHL
■ OPERATINGVOLTAGERANGE:
V
(OPR)= 4.5Vto 5.5V
CC
■ PINANDFUNCTION COMPATIBLEWITH
74SERIES273
■ IMPROVEDLATCH-UPIMMUNITY
■ LOWNOISE:V
DESCRIPTION
The 74VHCT273A is an advanced high-speed
CMOS OCTAL D-TYPE FLIP FLOP WITH
CLEAR fabricated with sub-micron silicon gate
and double-layer metal wiring C
= 0.9V(Max.)
OLP
2
MOS
74VHCT273A
M
(Micro Package)
(TSSOPPackage)
ORDERCODES :
74VHCT273AM 74VHCT273AT
technology.
Information signals applied to D inputs are
transfered to the Q outputson the positive going
edgeof the clockpulse.
Whenthe CLEAR input is held low, the Q outputs
are held low independentlyof theother inputs.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
devicecan be usedto interface5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
T
PIN CONNECTION AND IEC LOGICSYMBOLS
November 1999
1/9
74VHCT273A
INPUT EQUIVALENTCIRCUIT
TRUTH TABLE
INPUTS OUTPUTS FUNCTION
CLE AR D CLOCK Q
L X X L CLEAR
HL L
HH H
HX Q
X:Don’tCare
PIN DESCRIPTION
PI N No SYM BO L NAM E AND F U NCTIO N
1 CLEAR Asyncronous Master
Reset (Active LOW)
2, 5, 6, 9,
12, 15,16,
19
3, 4, 7, 8,
13, 14,17,
18
11 CLOCK Clock Input
10 GND Ground (0V)
20 V
n
Q0 to Q7 Flip-Flop Outputs
D0 to D7 Data Inputs
(LOW-to-HIGH, EdgeTriggered)
CC
Positive Supply Voltage
NO CHANGE
LOGICDIAGRAM
Thislogic diagram has not be used to esimate propagation delays
2/9
74VHCT273A
ABSOLUTE MAXIMUM RATINGS
Symb o l Para met er Value U n i t
V
V
V
V
I
I
OK
I
or I
I
CC
T
T
AbsoluteMaximumRatingsarethosevaluesbeyond whichdamage tothedevicemayoccur.Functionaloperation underthese conditionisnotimplied.
1)V
=0
CC
2)HighorLowState
RECOMMENDED OPERATING CONDITIONS
Symb o l Para met er Value Unit
V
V
V
V
T
dt/dv
1)VCC=0
2)HighorLowState
from0.8Vto 2V
3)V
IN
Supply Voltage -0.5 to +7.0 V
CC
DC Input Voltage -0.5 to +7.0 V
I
DC Output Voltage (see note 1) -0.5 to +7.0 V
O
DC Output Voltage (see note 2) -0.5 to VCC+ 0.5 V
O
DC Input Diode Current - 20 mA
IK
DC Output Diode Current
DC Output Current
O
DC VCCor Ground Current ± 50 mA
GND
Storage Temperature -65 to +150
stg
Lead Temperature (10 sec) 300
L
Supply Voltage 4.5 to 5.5 V
CC
Input Voltage 0 to 5.5 V
I
Output Voltage (see note 1) 0 to 5.5 V
O
Output Voltage (see note 2) 0 to V
O
Operating Temperature -40 to +85
op
Input Rise and Fall Time (see note 3) (V
=5.0±0.5V)
CC
20 mA
±
25 mA
±
CC
0 to20 ns/V
o
C
o
C
V
o
C
DC SPECIFICATIONS
Symb o l Para met er Test Con di ti o ns Val u e Uni t
T
=25oC -40 to 85oC
A
1.35 1.5 mA
µ
V
V
V
V
I
∆I
I
OPD
V
CC
High Level Input
IH
(V)
4.5 to 5.5 2 2 V
Min. Typ. Max. Min. Max.
Voltage
Low Level Input
IL
4.5 to 5.5 0.8 0.8 V
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
Input Leakage Current 0 to 5.5 VI= 5.5V or GND ±0.1 ±1.0 µA
I
I
Quiescent Supply
CC
4.5 IO=-50 µA 4.4 4.5 4.4
4.5 I
=-8 mA 3.94 3.8
O
4.5 IO=50 µA 0.0 0.1 0.1
4.5 I
=8 mA 0.36 0.44
O
5.5 VI=VCCorGND 4 40
Current
Additional Worst Case
CC
Supply Current
5.5 One Input at 3.4V,
other inputat V
CC
or
GND
Output Leakage
0V
= 5.5V 0.5 5.0 µA
OUT
Current
V
V
A
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