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HEX D-TYPE FLIP FLOP WITH CLEAR
■ HIGHSPEED:
f
=150MHz(TYP.)at VCC=5V
MAX
■ LOW POWER DISSIPATION:
=4 µA (MAX.)at TA=25oC
I
CC
■ COMPATIBLEWITHTTLOUTPUTS:
V
=2V(MIN),VIL=0.8V(MAX)
IH
■ POWERDOWNPROTECTIONON INPUTS&
OUTPUTS
■ SYMMETRICALOUTPUTIMPEDANCE:
|I
|=IOL=8 mA(MIN)
OH
■ BALANCEDPROPAGATIONDELAYS:
t
≅ t
PLH
PHL
■ OPERATINGVOLTAGERANGE:
V
(OPR)= 4.5Vto 5.5V
CC
■ PINANDFUNCTIONCOMPATIBLEWITH
74SERIES174
■ IMPROVEDLATCH-UP IMMUNITY
■ LOWNOISE:V
DESCRIPTION
The 74VHCT174A is an advanced high-speed
CMOS HEX D-TYPE FLIP FLOP WITH CLEAR
fabricated with sub-micron silicon gate and
double-layermetal wiring C
Information signals applied to D inputs are
= 0.8V(Max.)
OLP
2
MOS technology.
74VHCT174A
PRELIMINARY DATA
SOP TSSOP
ORDER CODES
PACKAGE TUBE T & R
SOP 74VHCT174AM 74VHCT174AMTR
TSSOP 74VH C T174ATTR
transfered to the Q outputs on the positive going
edgeof theclock pulse.
Whenthe CLEAR input is held low, the Q outputs
are held low independentlyof the other inputs.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
devicecan be used to interface 5Vto 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGICSYMBOLS
March 2000
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74VHCT174A
INPUT EQUIVALENTCIRCUIT
TRUTH TABLE
INPUTS OUTPUTS FUNCTION
CLE AR D CLOCK Q
L X X L CLEAR
HL L
HH H
HX Q
X:Don’tCare
PIN DESCRIPTION
PI N No SYM BO L NAM E AND F U NCTION
1 CLEAR Asyncronous Master
Reset (Active LOW)
2,5,7,10,
12, 15
3,4,6,11,
13, 14
9 CLOCK Clock Input
8 GND Ground (0V)
16 V
n
Q0toQ5 Flip-Flop Outputs
D0toD5 Data Inputs
(LOW-to-HIGH, EdgeTriggered)
Positive Supply Voltage
CC
NOCHANGE
LOGICDIAGRAM
Thislogic diagram has not be used to estimate propagation delays
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74VHCT174A
ABSOLUTE MAXIMUM RATINGS
Symb o l Para met er Value U n i t
V
V
V
V
I
I
OK
I
orI
I
CC
T
T
AbsoluteMaximumRatingsarethosevaluesbeyond whichdamage tothedevicemayoccur. Functionaloperation undertheseconditionisnotimplied.
1)V
=0
CC
2)HighorLowState
RECOMMENDED OPERATINGCONDITIONS
Symb o l Para met er Value Unit
V
V
V
V
T
dt/dv
1)VCC=0
2)HighorLowState
from0.8Vto 2 V
3)V
IN
Supply Voltage -0.5to+7.0 V
CC
DC Input Voltage -0.5to+7.0 V
I
DC Output Voltage (see note 1) -0.5to+7.0 V
O
DC Output Voltage (see note 2) -0.5toVCC+0.5 V
O
DC Input Diode Current -20 mA
IK
DC Output Diode Current
DC Output Current
O
DC VCCor Ground Current ±50 mA
GND
Storage Temperature -65to+150
stg
Lead Temperature (10 sec) 300
L
Supply Voltage 4.5to5.5 V
CC
Input Voltage 0to5.5 V
I
Output Voltage (see note 1) 0to5.5 V
O
Output Voltage (see note 2) 0toV
O
Operating Temperature -40to+85
op
Input Rise and Fall Time (see note 3) (V
=5.0±0.5V)
CC
20 mA
±
25 mA
±
CC
0to20 ns/V
o
C
o
C
V
o
C
DC SPECIFICATIONS
Symb o l Para met er Test Con diti ons Val u e Un i t
T
V
CC
High Level Input
V
IH
(V)
4.5to5.5 2 2 V
Min. Typ. Max. Min. Max.
Voltage
Low Level Input
V
IL
4.5to5.5 0.8 0.8 V
Voltage
High Level Output
V
OH
Voltage
Low Level Output
V
OL
Voltage
Input Leakage Current 0to5.5 VI=5.5Vor GND ±0.1 ±1.0 µA
I
I
Quiescent Supply
I
CC
4.5 IO=-50µA4.44.5 4.4
4.5 I
=-8mA 3.94 3.8
O
4.5 IO=50µA 0.0 0.1 0.1
4.5 I
=8mA 0.36 0.44
O
5.5 VI=VCCorGND 4 40
Current
Additional Worst Case
∆I
CC
Supply Current
5.5 One Input at3.4V,
other input at V
CC
or
GND
I
OPD
Output Leakage
0V
=5.5V 0.5 5.0 µA
OUT
Current
=25oC -40 to 85oC
A
1.35 1.5 mA
µ
V
V
A
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