SGS Thomson Microelectronics 74VHCT174A Datasheet

HEX D-TYPE FLIP FLOP WITH CLEAR
HIGHSPEED:
f
=150MHz(TYP.)at VCC=5V
MAX
LOW POWER DISSIPATION:
=4 µA (MAX.)at TA=25oC
I
COMPATIBLEWITHTTLOUTPUTS:
V
=2V(MIN),VIL=0.8V(MAX)
IH
POWERDOWNPROTECTIONON INPUTS&
OUTPUTS
SYMMETRICALOUTPUTIMPEDANCE:
|I
|=IOL=8 mA(MIN)
OH
BALANCEDPROPAGATIONDELAYS:
t
t
PLH
PHL
OPERATINGVOLTAGERANGE:
V
(OPR)= 4.5Vto 5.5V
PINANDFUNCTIONCOMPATIBLEWITH
74SERIES174
IMPROVEDLATCH-UP IMMUNITY
LOWNOISE:V
DESCRIPTION
The 74VHCT174A is an advanced high-speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layermetal wiring C
Information signals applied to D inputs are
= 0.8V(Max.)
OLP
2
MOS technology.
74VHCT174A
PRELIMINARY DATA
SOP TSSOP
ORDER CODES
PACKAGE TUBE T & R
SOP 74VHCT174AM 74VHCT174AMTR
TSSOP 74VH C T174ATTR
transfered to the Q outputs on the positive going edgeof theclock pulse.
Whenthe CLEAR input is held low, the Q outputs are held low independentlyof the other inputs.
Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This devicecan be used to interface 5Vto 3V.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGICSYMBOLS
March 2000
1/10
74VHCT174A
INPUT EQUIVALENTCIRCUIT
TRUTH TABLE
INPUTS OUTPUTS FUNCTION
CLE AR D CLOCK Q
L X X L CLEAR HL L HH H HX Q
X:Don’tCare
PIN DESCRIPTION
PI N No SYM BO L NAM E AND F U NCTION
1 CLEAR Asyncronous Master
Reset (Active LOW)
2,5,7,10,
12, 15
3,4,6,11,
13, 14
9 CLOCK Clock Input
8 GND Ground (0V)
16 V
n
Q0toQ5 Flip-Flop Outputs
D0toD5 Data Inputs
(LOW-to-HIGH, Edge­Triggered)
Positive Supply Voltage
CC
NOCHANGE
LOGICDIAGRAM
Thislogic diagram has not be used to estimate propagation delays
2/10
74VHCT174A
ABSOLUTE MAXIMUM RATINGS
Symb o l Para met er Value U n i t
V
V V V
I
I
OK
I
orI
I
CC
T
T
AbsoluteMaximumRatingsarethosevaluesbeyond whichdamage tothedevicemayoccur. Functionaloperation undertheseconditionisnotimplied.
1)V
=0
CC
2)HighorLowState
RECOMMENDED OPERATINGCONDITIONS
Symb o l Para met er Value Unit
V
V V V
T
dt/dv
1)VCC=0
2)HighorLowState from0.8Vto 2 V
3)V
IN
Supply Voltage -0.5to+7.0 V
CC
DC Input Voltage -0.5to+7.0 V
I
DC Output Voltage (see note 1) -0.5to+7.0 V
O
DC Output Voltage (see note 2) -0.5toVCC+0.5 V
O
DC Input Diode Current -20 mA
IK
DC Output Diode Current DC Output Current
O
DC VCCor Ground Current ±50 mA
GND
Storage Temperature -65to+150
stg
Lead Temperature (10 sec) 300
L
Supply Voltage 4.5to5.5 V
CC
Input Voltage 0to5.5 V
I
Output Voltage (see note 1) 0to5.5 V
O
Output Voltage (see note 2) 0toV
O
Operating Temperature -40to+85
op
Input Rise and Fall Time (see note 3) (V
=5.0±0.5V)
CC
20 mA
±
25 mA
±
CC
0to20 ns/V
o
C
o
C
V
o
C
DC SPECIFICATIONS
Symb o l Para met er Test Con diti ons Val u e Un i t
T
V
CC
High Level Input
V
IH
(V)
4.5to5.5 2 2 V
Min. Typ. Max. Min. Max.
Voltage Low Level Input
V
IL
4.5to5.5 0.8 0.8 V
Voltage High Level Output
V
OH
Voltage Low Level Output
V
OL
Voltage Input Leakage Current 0to5.5 VI=5.5Vor GND ±0.1 ±1.0 µA
I
I
Quiescent Supply
I
CC
4.5 IO=-50µA4.44.5 4.4
4.5 I
=-8mA 3.94 3.8
O
4.5 IO=50µA 0.0 0.1 0.1
4.5 I
=8mA 0.36 0.44
O
5.5 VI=VCCorGND 4 40
Current Additional Worst Case
I
CC
Supply Current
5.5 One Input at3.4V, other input at V
CC
or
GND
I
OPD
Output Leakage
0V
=5.5V 0.5 5.0 µA
OUT
Current
=25oC -40 to 85oC
A
1.35 1.5 mA
µ
V
V
A
3/10
74VHCT174A
AC ELECTRICAL CHARACTERISTICS
(Inputt
r=tf
=3 ns)
Symbol Parameter Test Condition Value Unit
t
Propagation Delay
PLH
t
Time
PHL
CK to Q
t
Propagation Delay
PHL
Time CLR to Q
CLR pulse Width
t
w
LOW CK pulse Width
t
w
HIGH or LOW Setup Time D to CK
t
s
HIGH or LOW Hold Time D to CK
t
h
HIGH or LOW Removal Time
t
REM
CLR to CK Maximum Clock
f
MAX
Frequency
(*) Voltagerangeis5V ± 0.5V
V
(V)
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
CC
C
L
(pF)
(*) (*)
15 7.2 11.0 1.0 13.0 50
(*) (*)
15 7.4 11.4 1.0 13.5 50
(*)
(*)
(*)
(*)
(*)
(*) (*)
15 95 150 80 50
T
=25oC -40 to 85oC
A
Min. Typ. Max. Min. Max.
9.7 14.5 1.0 16.5
9.9 14.9 1.0 17.0
5.0 5.0
5.0 5.0
5.0 6.0
0.0 0.0
3.0 3.0
55 85 50
ns
ns
ns
ns
ns
ns
ns
MHz
CAPACITIVE CHARACTERISTICS
Symb o l Para met er Test Con diti ons Val u e Un i t
=25oC -40 to 85oC
T
A
Min. Typ. Max. Min. Max.
Input Capacitance 4 10 10
C
IN
Power Dissipation
C
PD
29 pF
Capacitance (note 1)
1)CPDisdefined as thevalueoftheIC’sinternalequivalentcapacitance whichiscalculatedfromtheoperatingcurrentconsumption without load.(Referto TestCircuit).Average operatingcurrent canbeobtainedbythefollowingequation.I
(opr)= CPD• VCC• fIN+ICC/6(perFlip-Flop)
CC
pF
4/10
74VHCT174A
DYNAMICSWITCHING CHARACTERISTICS
Symb o l Para met er Test Con diti ons Val u e Un i t
T
V
CC
(V)
V V
Dynamic Low Voltage
OLP
Quiet Output (note 1, 2)
OLV
Dynamic High Voltage
V
IHD
5.0
5.0 2.0
C
=50pF
L
Min. Typ. Max. Min. Max.
Input (note 1, 3) Dynamic Low Voltage
V
ILD
5.0 0.8
Input (note 1, 3)
1)Worst casepackage.
2)Maxnumberofoutputsdefined as(n).Datainputsaredriven 0Vto3.0V,(n-1)outputsswitching andoneoutput atGND.
3)Maxnumberofdatainputs(n)switching.(n-1)switching0Vto3.0V.Inputsunder testswitching: 3.0Vtothreshold(V
TESTCIRCUIT
=25oC -40 to 85oC
A
0.3 0.8
-0.8 -0.3
),0Vtothreshold (V
ILD
),f=1MHz.
IHD
V
CL= 15/50 pForequivalent (includes jigand probecapacitance) R
ofpulsegenerator(typically50)
T=ZOUT
5/10
74VHCT174A
WAVEFORM1: PROPAGATIONDELAYS, SETUP AND HOLDTIMES
(f=1MHz;50% duty cycle)
6/10
74VHCT174A
WAVEFORM2: PROPAGATIONDELAYS
(f=1MHz;50% duty cycle)
WAVEFORM3: REMOVAL TIME(f=1MHz; 50%duty cycle)
7/10
74VHCT174A
SO-16 MECHANICALDATA
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.75 0.068 a1 0.1 0.2 0.004 0.007 a2 1.65 0.064
b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45 (typ.)
D 9.8 10 0.385 0.393
E 5.8 6.2 0.228 0.244
e 1.27 0.050 e3 8.89 0.350
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.62 0.024
S 8 (max.)
mm inch
8/10
P013H
TSSOP16 MECHANICAL DATA
74VHCT174A
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.1 0.433
A1 0.05 0.10 0.15 0.002 0.004 0.006
A2 0.85 0.9 0.95 0.335 0.354 0.374
b 0.19 0.30 0.0075 0.0118
c 0.09 0.20 0.0035 0.0079
D 4.9 5 5.1 0.193 0.197 0.201
E 6.25 6.4 6.5 0.246 0.252 0.256
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0
o
o
4
o
8
o
0
o
4
L 0.50 0.60 0.70 0.020 0.024 0.028
o
8
A2
A
A1
PIN 1 IDENTIFICATION
b
e
c
K
L
E
D
E1
1
9/10
74VHCT174A
Information furnished isbelieved tobe accurate and reliable. However, STMicroelectronics assumes no responsibility forthe consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject tochange withoutnotice. Thispublication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in lifesupport devices or systems withoutexpress written approval of STMicroelectronics.
The ST logo is a registeredtrademark of STMicroelectronics
2000 STMicroelectronics – Printed in Italy– All RightsReserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy- Japan - Malaysia - Malta - Morocco
Singapore - Spain- Sweden - Switzerland- United Kingdom - U.S.A.
http://www.st.com
.
10/10
Loading...