SGS Thomson Microelectronics 74VHCT138A Datasheet



3 TO 8 LINE DECODER (INVERTING)

■ HIGH SPEED:t

■ LOW POW ERDISSIPATION:

=4 µA(M AX.)at TA=25oC

I

CC

■ COMPATIBLEWITHTTLOUTPUTS:

=2V(MIN),VIL=0.8V(MAX)

V

IH

■ POWERDOWNPROTECTIONON INPUTS&

OUTPUTS

■ SYMMETRICAL OUTPUTIMPEDANCE:

|I

|=IOL=8 mA(MIN)

OH

■ BALANCEDPROPAGATIONDELAYS:

t

≅ t

PLH

PHL

■ OPERATINGVOLTAGERAN GE:

(OPR)= 4.5V to 5.5V

V

CC

■ PINANDFUNCTIONCOMPATIBLEWITH

74SERIES138

■ IMPROVEDLATCH-UP IMMUNITY

■ LOWNOISE:V

DESCRIPTION

The 74VHCT138A is an advanced high-speed
CMOS 3 TO 8 LINE DECODER (INVERTING)
fabricated with sub-micron silicon gate and
double-layermetal wiringC

If the device is enabled,3 binary select inputs (A,
B and C) determine which one of the outputs will
go low. If enable input G1 is held low or either

=7.6ns (TYP.)atVCC=5V

PD

= 0.8V(Max.)

OLP

2

MOS technology.

74VHCT138A

PRELIMINARY DATA

SOP TSSOP

ORDER CODES

PACKAGE TUBE T & R

SOP 74VHCT138AM 74VHCT138AMTR

TSSOP 74VHCT138ATTR

G2A or G2B is heldhigh, the decoding function is
inhibitedand all the 8 outputsgo to high.

Three enable inputs are provided to ease
cascade connection and application of address
decodersfor memory systems.

Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
devicecan be used tointerface5V to 3V.

All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

March 2000

1/8

74VHCT138A

INPUT EQUIVALENTCIRCUIT

PIN DESCRIPTION

PI N No SYM BO L NAM E AND FU NCTION

1, 2, 3 A, B, C Address Inputs

4, 5 G2A, G2B Enable Inputs

6 G1 Enable Input

15, 14, 13,
12, 11, 10,

9, 7

8 GND Ground (0V)

16 V

Y0 to Y7 Outputs

CC

Positive Supply Voltage

TRUTH TABLE

INPUTS OUTPUTS

ENABLE SELECT

G2BG2AG1 C B A Y0Y1Y2Y3Y4Y5Y6Y7

XXLXXXHHHHHHHH
XHXXXXHHHHHHHH
HXXXXXHHHHHHHH
LLHLLLLHHHHHHH
LLHLLHHLHHHHHH
LLHLHLHHLHHHHH
LLHLHHHHHLHHHH
LLHHLLHHHHLHHH
LLHHLHHHHHHLHH
LLHHHLHHHHHHLH
LLHHHHHHHHHHHL

X:Don’tCare

LOGICDIAGRAM

Thislogicdiagram has notbe used toestimate propagation delays

2/8

74VHCT138A

ABSOLUTE MAXIMUM RATINGS

Symb o l Para met er Value U n i t

V

V
V
V

I

I

OK

I

or I

I

CC

T

T

AbsoluteMaximumRatingsarethosevaluesbeyondwhichdamagetothedevice mayoccur. Functional operation under these condition isnotimplied.

1)V

=0

CC

2)High orLow State

RECOMMENDED OPERATINGCONDITIONS

Symb o l Para met er Value Unit

V

V
V
V

T

dt/dv

1)VCC=0

2)High orLow State
from0.8Vto 2 V

3)V

IN

Supply Voltage -0.5 to +7.0 V

CC

DC Input Voltage -0.5 to +7.0 V

I

DC Output Voltage (see note 1) -0.5 to +7.0 V

O

DC Output Voltage (see note 2) -0.5 to VCC+ 0.5 V

O

DC Input Diode Current - 20 mA

IK

DC Output Diode Current
DC Output Current

O

DC VCCor Ground Current ± 50 mA

GND

Storage Temperature -65 to +150

stg

Lead Temperature (10 sec) 300

L

Supply Voltage 4.5 to 5.5 V

CC

Input Voltage 0 to 5.5 V

I

Output Voltage (see note 1) 0 to 5.5 V

O

Output Voltage (see note 2) 0 to V

O

Operating Temperature -40 to +85

op

Input Rise and Fall Time (see note 3) (V

=5.0±0.5V)

CC

20 mA

±

25 mA

±

CC

0 to 20 ns/V

o

C

o

C

V

o

C

DC SPECIFICATIONS

Symb o l Para met er Test C o n ditions Val u e Uni t

T

=25oC -40 to 85oC

A

1.35 1.5 mA

µ

V

V

V

V

I

∆I

I

OPD

V

CC

High Level Input

IH

(V)

4.5 to 5.5 2 2 V

Min. Typ. Max. Min. Max.

Voltage
Low Level Input

IL

4.5 to 5.5 0.8 0.8 V

Voltage
High Level Output

OH

Voltage
Low Level Output

OL

Voltage
Input Leakage Current 0 to 5.5 VI= 5.5V or GND ±0.1 ±1.0 µA

I

I

Quiescent Supply

CC

4.5 IO=-50 µA 4.4 4.5 4.4

4.5 I

=-8 mA 3.94 3.8

O

4.5 IO=50 µ A 0.0 0.1 0.1

4.5 I

=8 mA 0.36 0.44

O

5.5 VI=VCCorGND 4 40

Current
Additional Worst Case

CC

Supply Current

5.5 One Input at 3.4V,
other input at V

CC

or

GND

Output Leakage

0V

= 5.5V 0.5 5.0 µA

OUT

Current

V

V

A

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