SGS Thomson Microelectronics 74VHC74TTR, 74VHC74MTR, 74VHC74M Datasheet

1/11June 2001

■ HIGH SPEED:

f

MAX

= 170 MHz (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION:

I

CC

= 2 µA (MAX.) at TA=25°C

■ HIGH NOISE IMMUNITY:

V

NIH

= V

NIL

= 28% VCC (MIN.)

■ POWER DOWN PROTECTION ON INPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE:

|I

OH

| = IOL = 8 mA (MIN)

■ BALANCED PROPAGATION DELAYS:

t

PLH

≅ t

PHL

■ OPERATING VOLTAGE RANGE:

V

CC

(OPR) = 2V to 5.5V

■ PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 74

■ IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74VHC74 is a n advanced high-speed CMOS
DUAL D-TYPE FLIP FLOP WITH PRESET AND
CLEAR fabricated with sub-micron silicon gate
and double-layer metal wiring C

2

MOS technology.
A signal on the D INPUT is transferred to the Q
OUTPUTS during the positive go ing transition of
the clock pulse.

CLR

and PR are independent of the clock and
accomplished by a l ow setting on the app ropriate
input.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.

74VHC74

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

PIN CONNECTION AND IEC LOGIC SYMBOLS

ORDER CODES

PACKAGE TUBE T & R

SOP 74VHC74M 74VHC74MTR

TSSOP 74VHC74TTR

TSSOPSOP

74VHC74

2/11

INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION

TRUTH TABLE

X : Don’t Care

LOGIC DIAGRAM

This log i c diagram has not be used to estimate propagation delays

PIN No SYMBOL NAME AND FUNCTION

1, 13 1CLR

, 2CLR

Asynchronous Reset -

Direct Input
2, 12 1D, 2D Data Inputs
3, 11 1CK, 2CK Clock Input

(LOW to HIGH, Edge

Triggered)
4, 10 1PR

, 2PR Asynchronous Set - Direct

Input

5, 9 1Q, 2Q True Flip-Flop Outputs
6, 8 1Q

, 2Q Complement Flip-Flop

Outputs

7 GND Ground (0V)

14 V

CC

Positive Supply Voltage

INPUTS OUTPUTS

FUNCTION

CLR

PR DCKQ Q

L H X X L H CLEAR

H L X X H L PRESET

LLXXHH

HHL LH
HHH HL
HHX

Q

n

Q

n

NO CHANGE

74VHC74

3/11

ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied

RECOMMENDED OPERATING CONDITIONS

1) VIN from 30 % to 70% of V

CC

Symbol Parameter Value Unit

V

CC

Supply Voltage

-0.5 to +7.0 V

V

I

DC Input Voltage

-0.5 to +7.0 V

V

O

DC Output Voltage -0.5 to VCC + 0.5

V

I

IK

DC Input Diode Current

- 20 mA

I

OK

DC Output Diode Current

± 20 mA

I

O

DC Output Current

± 25 mA

I

CC

or I

GND

DC VCC or Ground Current

± 50 mA

T

stg

Storage Temperature

-65 to +150 °C

T

L

Lead Temperature (10 sec)

300 °C

Symbol Parameter Value Unit

V

CC

Supply Voltage

2 to 5.5 V

V

I

Input Voltage

0 to 5.5 V

V

O

Output Voltage 0 to V

CC

V

T

op

Operating Temperature

-55 to 125 °C

dt/dv

Input Rise and Fall Time (note 1) (V

CC

= 3.3 ± 0.3V)

(V

CC

= 5.0 ± 0.5V)

0 to 100

0 to 20

ns/V

74VHC74

4/11

DC SPECIFICATIONS

Symbol Parameter

Test Condition Value

Unit

V

CC

(V)

T

A

= 25°C

-40 to 85°C -55 to 125°C

Min. Typ. Max. Min. Max. Min. Max.

V

IH

High Level Input
Voltage

2.0 1.5 1.5 1.5
V

3.0 to

5.5

0.7V

CC

0.7V

CC

0.7V

CC

V

IL

Low Level Input
Voltage

2.0 0.5 0.5 0.5
V

3.0 to

5.5

0.3V

CC

0.3V

CC

0.3V

CC

V

OH

High Level Output
Voltage

2.0

I

O

=-50 µA

1.9 2.0 1.9 1.9

V

3.0

I

O

=-50 µA

2.9 3.0 2.9 2.9

4.5

I

O

=-50 µA

4.4 4.5 4.4 4.4

3.0

I

O

=-4 mA

2.58 2.48 2.4

4.5

I

O

=-8 mA

3.94 3.8 3.7

V

OL

Low Level Output
Voltage

2.0

IO=50 µA

0.0 0.1 0.1 0.1

V

3.0

I

O

=50 µA

0.0 0.1 0.1 0.1

4.5

I

O

=50 µA

0.0 0.1 0.1 0.1

3.0

I

O

=4 mA

0.36 0.44 0.55

4.5

I

O

=8 mA

0.36 0.44 0.55

I

I

Input Leakage
Current

0 to

5.5

V

I

= 5.5V or GND

± 0.1 ± 1 ± 1 µA

I

CC

Quiescent Supply
Current

5.5

V

I

= VCC or GND

22020µA