1/11February 2003
■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ HIGH SPEED :
t
PD
= 2.5 ns (MAX.) at VCC=3.0to3.6V
t
PD
= 3.0 ns (MAX.) at VCC=2.3to2.7V
■ POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=IOL= 24mA (MIN) at VCC=3.0V
|I
OH
|=IOL= 18mA (MIN) at VCC=2.3V
■ OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.3V to 3.6V
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES H16240
■ BUS HOLD PROVIDED ON DATA INPUTS
■ LATCH-UP P ERFO RMANCE EXCEEDS
300mA (JESD 17)
■ ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74VCXH16240 is a low voltage CMOS 16 BIT
BUS BUFFER (INVERTED) fabricated with
sub-micron silicon gate and five-layer metal wiring
C
2
MOS technology. It is ideal for low power and
very high s peed 2.3 to 3.6V applications; it can be
interfaced to 3.6V signal environment for both
inputs and outputs.
Any nG
output con trol governs four BUS
BUFFERS. Output Enable input (nG
) tied together
gives full 16-bit operation.
When nG
is LO W, the outputs are on. When nG is
HIGH, the output are in high impedance state.
This dev ice is designed to be us ed with 3 state
memory address drivers, etc. Bus hold on data
inputs is p ro vided in order to eli minate the need f or
external pull-up or pull-down resistor.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD imm unity and transient excess
voltage.
74VCXH16240
LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE INV.)
WITH 3.6V TOLERANT INPUTS AND OUTPUTS
ORDER CODES
PACKAGE TUBE T & R
TSSOP 74VCXH16240TTR
TSSOP
PIN CO NNE CTION