1/12February 2003
■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ HIGH SPEED :
t
PD
= 3.3 ns (MAX.) at VCC=3.0to3.6V
t
PD
= 4.5 ns (MAX.) at VCC=2.3to2.7V
■ POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=IOL= 12mA (MIN) at VCC=3.0V
|I
OH
|=IOL=8mA(MIN)atVCC=2.3V
■ 26ΩSERIE RESISTOR IN OUTPUTS
■ OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.3V to 3.6V
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES H162373
■ BUS HOLD PROVIDED ON DATA INPUTS
■ LATCH-UP P ERFO RMANCE EXCEEDS
300mA (JESD 17)
■ ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74VCXH162373 is a low voltage CMOS 16
BIT D-TYPE LATCH with 3 STATE OUTPUTS
NON INVERTING fabricated with sub-micron
silicon gate and five-layer metal wiring C
2
MOS
technology. It is ideal for low power and very high
speed 2.3 to 3.6V applications; it can be interfac ed
to 3.6V signal environment for both inputs and
outputs.
These 16 bit D-TYPE latches are bite controlled
by two latch enable inputs (nLE) and two output
enable inputs (OE
).
While the nLE input is held at a high level, the nQ
outputs will follow the data input precisely.
When the nLE is taken low, the nQ outputs will be
in a normal logic state (high or low logic level) and
while high level the outputs will be in a high
impedance state. Bus hold o n data i nputs is
provided in order to eliminate the nee d for external
pull-up or pull-down resistor. The device circuits is
including 26Ω series res istance in the outputs.
These resistors permit to reduc e line noise in high
speed applications.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74VCXH162373
LOW VOLTAGE CMOS 16-BIT D-TYPE LATCH (3-STATE)
WITH 3.6V TOLERANT INPUTS AN D OUTPUTS
ORDER CODES
PACKAGE TUBE T & R
TSSOP 74VCXH162373TTR
TSSOP
PIN CO NNE CTION
74VCXH162373
2/12
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
X : Don‘t Care
Z : High Impedance
* : Qoutputs arelatched atthetime when theLE inputistaken low
logiclevel.
IEC LOGIC SYMBOLS
PIN No SYMBOL NAME AND FUNCTION
1 1OE
3 State Output Enable
Input (Active LOW)
2, 3,5,6,8,9,
11, 12
1Q0 to 1Q7 3-State Outputs
13,14,16,17,
19, 20, 22, 23
2Q0 to 2Q7 3-State Outputs
24 2OE
3 State Output Enable
Input (Active LOW)
25 2LE Latch Enable Input
36,35,33,32,
30, 29, 27, 26
2D0 to 2D7 Data Inputs
47,46,44,43,
41, 40, 38, 37
1D0 to 1D7 Data Inputs
48 1LE Latch Enable Input
4, 10, 15, 21,
28, 34, 39, 45
GND Ground (0V)
7, 18, 31, 42 V
CC
Positive Supply Voltage
INPUTS OUTPUT
OE
LE D Q
HXX Z
L L X NO CHANGE *
LHL L
LHH H
74VCXH162373
3/12
LOGIC DIAGRAM
This logic diagram has not to be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) I
O
absolute maximum rating must be observed
2) VO<GND,VO>V
CC
RECOMMENDED OPERATING CONDITIONS
1) VINfrom0.8V to 2Vat VCC=3.0V
Symbol Parameter Value Unit
V
CC
Supply Voltage
-0.5 to +4.6 V
V
I
DC Input Voltage
-0.5 to +4.6 V
V
O
DC Output Voltage (OFF State)
-0.5 to +4.6 V
V
O
DC Output Voltage (High or Low State) (note 1) -0.5 to VCC+ 0.5
V
I
IK
DC Input Diode Current
-50 mA
I
OK
DC Output Diode Current (note 2)
-50 mA
I
O
DC Output Current
± 50 mA
I
CC
or I
GND
DC VCCor Ground Current per Supply Pin
± 100 mA
P
D
Power Dissipation
400 mW
T
stg
Storage Temperature
-65 to +150 °C
T
L
Lead Temperature (10 sec)
300 °C
Symbol Parameter Value Unit
V
CC
Supply Voltage
2.3 to 3.6 V
V
I
Input Voltage
-0.3 to 3.6 V
V
O
Output Voltage (OFF State)
0 to 3.6 V
V
O
Output Voltage (High or Low State) 0 to V
CC
V
I
OH,IOL
High or Low Level Output Current (VCC= 3.0 to 3.6V)
± 12 mA
I
OH,IOL
High or Low Level Output Current (VCC= 2.3 to 2.7V)
± 8mA
T
op
Operating Temperature
-55 to 125 °C
dt/dv Input Rise and Fall Time (note 1) 0 to 10 ns/V
74VCXH162373
4/12
DC SPECIFICATIONS (2.7V < VCC< 3.6V unless otherwise specified)
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
-40to85°C -55to125°C
Min. Max. Min. Max.
V
IH
High Level Input
Voltage
2.7to3.6
2.0 2.0
V
V
IL
Low Level Input
Voltage
0.8 0.8
V
OH
High Level Output
Voltage
2.7to3.6
IO=-100 µAVCC-0.2 VCC-0.2
V
2.7
I
O
=-6 mA
2.2 2.2
3.0
I
O
=-8 mA
2.4 2.4
I
O
=-12 mA
2.2 2.2
V
OL
Low Level Output
Voltage
2.7to3.6
IO=100 µA
0.2 0.2
V
2.7
I
O
=6 mA
0.4 0.4
3.0
I
O
=8 mA
0.55 0.55
I
O
=12 mA
0.8 0.8
I
I
Input Leakage
Current
2.7to3.6
V
I=VCC
or GND
± 5 ± 5 µA
I
I(HOLD)
Input Hold Current
3.0
VI= 0.8V
75 75
µA
V
I
=2V
-75 -75
3.6
V
I
= 0 to 3.6V
± 500 ± 500
I
off
Power Off Leakage
Current
0
V
I
or VO= 0 to 3.6V
10 10 µA
I
OZ
High Impedance
Output Leakage
Current
2.7to3.6
V
I=VIH
or V
IL
VO= 0 to 3.6V
± 10 ± 10 µA
I
CC
Quiescent Supply
Current
2.7to3.6
V
I=VCC
or GND
20 20
µA
V
I
or VO=VCCto
3.6V
± 20 ± 20
∆I
CC
ICCincr. per Input
2.7to3.6
VIH=VCC-0.6V
750 750 µA