SGS Thomson Microelectronics 74LVX594TTR, 74LVX594MTR, 74LVX594M Datasheet
1/11January 2003
■ HIGH SPEED :
t
PD
= 5.5ns (TYP.) at VCC=3.3V
■ 5V TOLERANT INPUTS
■ INPUT VOLTAGE LEVEL :
V
IL
=0.8V, VIH=2V at VCC=3V
■ LOW POWER DISSIPATION:
I
CC
=4µA (MAX.) at TA=25°C
■ LOW NOISE:
V
OLP
=0.3V(TYP.)atVCC=3.3V
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=IOL=4mA(MIN)
■ BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
■ OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 594
■ IMPROVED LATCH-UP IMMUNITY
■ POWER DOWN PROTECTION ON INPUTS
DESCRIPTION
The 74LVX594 is a low voltage CMOS 8 BIT
SHIFT REGISTER WITH OUTPUT REGISTER
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology. It is
ideal for low power, battery operated and low
noise 3.3V applications.
This device contains an 8-bit serial-in, parallel-out
shift register that feeds an 8-bit D-type storage
register. Separate clocks an d direct overriding
clear(SCLR,
RCLR) are provided for bot h the shift
register and the storage register. A serial (QH’)
output is provided for cascading purposes. Both
the shift register and sto rage register use
positive-edge triggered clocks. If the clocks are
connected together, the shift register state will
always be one clock pulse ahead of the storage
register.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V system. It combines
high s peed performance with the true CMOS low
power consumption.
All inputs and outputs are equipped with
protection circuits against s tatic discharge, giving
them 2K V ESD immunity and t ransient excess
voltage.
74LVX594
LOW VOLTAGE CMOS 8 BIT SHIFT REGISTER
WITH OUTPUT REGISTER (5V TOLERANT INPUTS)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
SOP 74LVX594M 74LVX594MTR
TSSOP 74LVX594TTR
TSSOPSOP
74LVX594
2/11
INPUT EQ UIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
X : Don’t Care
PIN No SYMBOL NAME AND FUNCTION
1, 2, 3, 4,5,
6, 7, 15
QA to QH Data Outputs
9 QH’ Serial Data Output
10 SCLR
Shift Register Clear Input
11 SCK Shift Register Clock Input
13 RCLR
Storage Register Clear
Input
14 SI Serial Data Input
12 RCK Storage Register Clock
Input
8 GND Ground (0V)
16 V
CC
Positive Supply Voltage
INPUTS
OUTPUTS
SI SCK SCLR RCK RCLR
X X L X X SHIFT REGISTER IS CLEAR
LHXX
FIRST STAGE OF SHIFT REGISTER GOES LOW
OTHER STAGES STORE THE DATA OF PREVI-
OUS STAGE, RESPECTIVELY
HHXX
FIRST STAGE OF SHIFT REGISTER GOES HIGH
OTHER STAGES STORE THE DATA OF PREVI-
OUS STAGE, RESPECTIVELY
L H X X SHIFT REGISTER STATEIS NOT CHANGED
X X X X L STORAGE REGISTER IS CLEARED
XXX H
SHIFT REGISTER DATAIS STORED IN THE
STORAGE REGISTER
X X X H STORAGE REGISTER STATE IS NOT CHANGED
74LVX594
3/11
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
74LVX594
4/11
TIMING CHART
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
Symbol Parameter Value Unit
V
CC
Supply Voltage
-0.5 to +7.0 V
V
I
DC Input Voltage
-0.5 to +7.0 V
V
O
DC Output Voltage -0.5 to VCC+ 0.5
V
I
IK
DC Input Diode Current
-20 mA
I
OK
DC Output Diode Current
± 20 mA
I
O
DC Output Current
± 25 mA
I
CC
or I
GND
DC VCCor Ground Current
± 50 mA
T
stg
Storage Temperature
-65 to +150 °C
T
L
Lead Temperature (10 sec)
300 °C
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