SGS Thomson Microelectronics 74LVX574MTR, 74LVX574M Datasheet

1/10July 2001

■ HIGH SPEED:

f

MAX

= 125MHz (TYP.) at VCC = 3.3V

■ 5V TOLERANT INPUTS

■ POWER-DOWN PROTECTION ON INPUTS

■ INPUT VOLTAGE LEVEL:

V

IL

= 0.8V, VIH = 2V at VCC =3V

■ LOW POWER DISSIPATION:

I

CC

= 4 µA (MAX.) at TA=25°C

■ LOW NOISE:

V

OLP

= 0.3V (TYP.) at VCC =3.3V

■ SYMMETRICAL OUTPUT IMPEDANCE:

|I

OH

| = IOL = 4 mA (MIN) at VCC =3V

■ BALANCED PROPAGATION DELAYS:

t

PLH

≅ t

PHL

■ OPERATING VOLTAGE RANGE:

V

CC

(OPR) = 2V to 3.6V (1.2V Data Retention)

■ PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 574

■ IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74LVX574 is a low voltage CMOS OCTAL
D-TYPE FLIP- FLO P with 3 STAT E OUT PUT NON
INVERTING fabricated with sub-micron silicon
gate and double-layer metal wiring C

2

MOS
technology. It is ideal for low power, battery
operated and low noise 3.3V applications.
This 8 bit D-Type flip-flop is controlled by a clock
input (CK) and an out put enable input (OE

). O n
the positive transition of th e clock, the Q outputs
will be set to the logic state that were set up at t he

D inputs. While the (OE

) input is low, the 8 outputs
will be in a norm al logic state (high or low logic
level) and while high le vel the outpu ts will be in a
high impedance state. The output control does not
affect the internal operation of flip flops; that is,
the old data can be retained or the new data can
be entered even while the outputs are off.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.

74LVX574

LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP

(3-STATE NON INV.) WITH 5V TOLERANT INP UTS

PIN CONNECTION AND IEC LOGIC SYMBOLS

ORDER CODES

PACKAGE TUBE T & R

SOP 74LVX574M 74LVX574MTR

TSSOP 74LVX574TTR

TSSOPSOP

74LVX574

2/10

INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION

TRUTH TABLE

X : Don’t Care
Z : High Impedance

LOGIC DIAGRAM

This log i c diagram has not be used to e st i m ate propagation dela ys

PIN No SYMBOL NAME AND FUNCTION

1OE

3-State Output Enable
Input (Active LOW)

2, 3, 4, 5, 6,

7, 8, 9

D0 to D7 Data Inputs

12, 13, 14,
15, 16, 17,

18, 19

Q0 to Q7 3-State Outputs

1 1 CK Clock Input (LOW-to-HIGH

Edge Triggered)
10 GND Ground (0V)
20 V

CC

Positive Supply Voltage

INPUTS OUTPUT

OE

CK D Q

HXXZ

L X NO CHANGE
LLL
LHH

74LVX574

3/10

ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied

RECOMMENDED OPERATING CONDITIONS

1) Truth T abl e guaranteed: 1.2V to 3.6V

2) V

IN

from 0.8V to 2.0V

DC SPECIFICATIONS

Symbol Parameter Value Unit

V

CC

Supply Voltage

-0.5 to +7.0 V

V

I

DC Input Voltage

-0.5 to +7.0 V

V

O

DC Output Voltage -0.5 to VCC + 0.5

V

I

IK

DC Input Diode Current

- 20 mA

I

OK

DC Output Diode Current

± 20 mA

I

O

DC Output Current

± 25 mA

I

CC

or I

GND

DC VCC or Ground Current

± 50 mA

T

stg

Storage Temperature

-65 to +150 °C

T

L

Lead Temperature (10 sec)

300 °C

Symbol Parameter Value Unit

V

CC

Supply Voltage (note 1)

2 to 3.6 V

V

I

Input Voltage

0 to 5.5 V

V

O

Output Voltage 0 to V

CC

V

T

op

Operating Temperature

-55 to 125 °C

dt/dv

Input Rise and Fall Time (note 2) (V

CC

= 3V)

0 to 100 ns/V

Symbol Parameter

Test Condition Value

Unit

V

CC

(V)

T

A

= 25°C

-40 to 85°C -55 to 125°C

Min. Typ. Max. Min. Max. Min. Max.

V

IH

High Level Input
Voltage

2.0 1.5 1.5 1.5
V3.0

2.0 2.0 2.0

3.6

2.4 2.4 2.4

V

IL

Low Level Input
Voltage

2.0 0.5 0.5 0.5
V3.0 0.8 0.8 0.8

3.6 0.8 0.8 0.8

V

OH

High Level Output
Voltage

2.0

IO=-50 µA

1.9 2.0 1.9 1.9
V3.0

I

O

=-50 µA

2.9 3.0 2.9 2.9

3.0

I

O

=-4 mA

2.58 2.48 2.4

V

OL

Low Level Output
Voltage

2.0

IO=50 µA

0.0 0.1 0.1 0.1
V3.0

I

O

=50 µA

0.0 0.1 0.1 0.1

3.0

I

O

=4 mA

0.36 0.44 0.55

I

OZ

High Impedance
Output Leakage
Current

3.6

V

I

= VIH or V

IL

VO = VCC or GND

±0.25 ± 2.5 ± 2.5 µA

I

I

Input Leakage
Current

3.6

V

I

= 5V or GND

± 0.1 ± 1 ± 1 µA

I

CC

Quiescent Supply
Current

3.6

V

I

= VCC or GND

44040µA