74LVX20
LOW VOLTAGE CMOS DUAL 4-INPUT NAND GATE
WITH 5V TOLERANT INPUTS
■ HIGH SPEED :
t
= 4.1ns (TYP.) at V
PD
■ 5V TOLERANT INPUTS
■ INPUT VOLTAGE LEVEL :
=0.8V , VIH=2V at VCC=3V
V
IL
■ LOW POWER DISSIPATION:
I
= 2 µA (MAX.) at TA=25°C
CC
■ LOW NOISE:
V
= 0.3V (TYP.) at VCC = 3.3V
OLP
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 4mA (MIN)
OH
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
■ OPERATING VOL TAGE RANGE:
V
CC
■ PIN AND FUNCTION COMPATIBLE WITH
PHL
(OPR) = 2V to 3.6V (1.2V Data Retention)
CC
= 3.3V
74 SERIES 20
■ IMPROVED LATCH-UP IMMUNITY
■ POWER DOWN PROTECTION ON INPUTS
DESCRIPTION
The 74LVX20 is a low voltage CMOS DUAL
4-INPUT NAND GATE fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
technology. It is ideal for low power, battery
operated and low noise 3.3V applications.
TSSOPSOP
ORDER CODES
PACKAGE TUBE T & R
SOP 74LVX20M 74LVX20MTR
TSSOP 74LVX20TTR
The internal circuit is composed of 3 stages
including buffer ou tput, which provides high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/8July 2001
74LVX20
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
1, 9 1A to 2A Data Inputs
2, 10 1B to 2B Data Inputs
3, 11 N.C. Not Connected
4, 12 1C to 2C Data Inputs
5, 13 1D to 2D Data Inputs
6, 8 1Y to 2Y Data Outputs
7 GND Ground (0V)
14
TRUTH TABLE
ABCDY
LXXXH
XLXXH
XXLXH
XXXLH
HHHHL
X : Don‘t Care
V
CC
Positive Supply Voltage
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
I
OK
I
I
or I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCC or Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
-0.5 to +7.0 V
-0.5 to +7.0 V
V
- 20 mA
± 20 mA
± 25 mA
± 50 mA
-65 to +150 °C
300 °C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
T
dt/dv
1) Truth T abl e guarante ed: 1.2V to 3.6 V
2) V
from 0.8V to 2.0V
IN
Supply Voltage (note 1)
CC
Input Voltage
I
Output Voltage 0 to V
O
Operating Temperature
op
Input Rise and Fall Time (note 2) (V
= 3.3V)
CC
2 to 3.6 V
0 to 5.5 V
CC
-55 to 125 °C
0 to 100 ns/V
V
2/8
DC SPECIFICATIONS
Symbol Parameter
V
V
V
V
I
High Level Input
IH
Voltage
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
Quiescent Supply
CC
Current
Test Condition Value
V
(V)
CC
= 25°C
A
Min. Typ. Max. Min. Max. Min. Max.
-40 to 85°C -55 to 125°C
T
2.0 1.5 1.5 1.5
3.6 2.4 2.4 2.4
2.0 0.5 0.5 0.5
3.6 0.8 0.8 0.8
2.0
3.0
2.0
3.0
3.6
3.6
IO=-50 µA
I
=-50 µA
O
I
=-4 mA
O
=50 µA
I
O
I
=50 µA
O
I
=4 mA
O
= 5V or GND
V
I
= VCC or GND
V
I
1.9 2.0 1.9 1.9
2.9 3.0 2.9 2.9
2.58 2.48 2.4
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
0.36 0.44 0.55
± 0.1 ± 1 ± 1 µA
22020µA
74LVX20
Unit
V3.0 2.0 2.0 2.0
V3.0 0.8 0.8 0.8
V3.0
V3.0
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition Value
T
Symbol Parameter
V
CC
(V)
V
V
V
Dynamic Low
OLP
Voltage Quiet
OLV
Output (note 1, 2)
Dynamic High
IHD
Voltage Input (note
3.3
3.3 2
= 50 pF
C
L
1, 3)
V
Dynamic Low
ILD
Voltage Input (note
3.3 0.8
1, 3)
1) Worst c ase package .
2) Max number of outp ut s defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V
(V
), f=1MHz.
IHD
= 25°C
A
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
0.3 0.5
-0.5 -0.3
ILD
Unit
V
), 0V to threshold
3/8