SGS Thomson Microelectronics 74LVQ574 Datasheet



WITH 3 STATE OUTPUTSNON INVERTING

■ HIGHSPEED:

=180MHz(TYP.)atVCC=3.3V

f

MAX

■ COMPATIBLEWITHTTLOUTPUTS

■

LOW POWERDISSIPATION:

=4µA (MAX.)at TA=25oC

I

CC

■

LOWNOISE:

=0.5V (TYP.)atVCC=3.3V

V

OLP

■ 75Ω TRANSMISSIONLINEDRIVING

CAPABILITY

■ SYMMETRICALOUTPUTIMPEDANCE:

|=IOL=12 mA (MIN)

|I

OH

■ PCIBUSLEVELSGUARANTEEDAT24mA

■ BALANCEDPROPAGATIONDELAYS:

≅ t

t

PLH

PHL

■ OPERATINGVOLTAGERANGE:

(OPR)= 2V to3.6V(1.2VDataRetention)

V

CC

■ PINANDFUNCTION COMPATIBLEWITH

74SERIES574

■

IMPROVEDLATCH-UPIMMUNITY

DESCRIPTION

The LVQ574 is a low voltage CMOS OCTAL
D-TYPE FLIP FLOP with 3 STATE OUTPUTS
NON INVERTING fabricated with sub-micron
silicon gate and double-layermetal wiring C
technology.It is ideal for low power and low noise

3.3Vapplications.
These 8 bit D-Type flip-flops are controlled by a

clockinput (CK)and an output enable input (OE).

2

MOS

74LVQ574

OCTAL D-TYPE FLIP FLOP

M

(Micro Package)

(TSSOPPackage)

ORDERCODES :

74LVQ574M 74LVQ574T

On the positive transition of the clock, the Q
outputs will be set to logic state that were setup
at the D inputs.

While the (OE) input is low, the 8 outputs will be
in al normal logic state (high or low logic level)
and while high level, the outputs will be in a high
impedancestate.

The output control does not affect the internal
operation of flip flop, that is, the old data can be
retained or the new data can be entered even
whilethe outputs are off.

It has better speed performance at 3.3V than 5V
LS-TTL family combined with the true CMOS low
powerconsumpion.

All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.

T

PIN CONNECTION AND IEC LOGIC SYMBOLS

February 1999

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74LVQ574

INPUT AND OUTPUT EQUIVALENTCIRCUIT PIN DESCRIPTION

PI N No SYMB OL NAME AND F UNCT I O N

1 OE 3 State Output Enable

2, 3, 4,
5, 6, 7,

8, 9

12, 13, 14,
15, 16, 17,

18, 19

11 CLOCK Clock Input (LOW to

10 GND Ground (0V)
20 V

TRUTH TABLE

INPUTS OUTPUTS

OE CK D Q

HXXZ

L X NO CHANGE
LLL
LHH

X:”H” or”L”
Z: HighImpedance

D0 to D7 Data Inputs

Q0 to Q7 3 State Outputs

CC

Input (Active LOW)

HIGH, edge triggered)

Positive Supply Voltage

LOGICDIAGRAMS

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74LVQ574

ABSOLUTE MAXIMUM RATINGS

Symb o l Paramet er Val u e Uni t

V

V

V

I

I

OK

I

or I

I

CC

T

T

AbsoluteMaximumRatingsarethose values beyond whichdamage tothedevicemayoccur. Functionaloperation undertheseconditionisnotimplied.

RECOMMENDED OPERATINGCONDITIONS

Symb o l Paramet er Value Un it

V

V

V

T

dt/dv Input Rise and Fall Time (V

1) Truth Table guaranteed: 1.2V to3.6V
from0.8Vto 2V

2)V

IN

Supply Voltage -0.5 to +7 V

CC

DC Input Voltage -0.5 to VCC+ 0.5 V

I

DC Output Voltage -0.5 to VCC+ 0.5 V

O

DC Input Diode Current ± 20 mA

IK

DC Output Diode Current ± 20 mA
DC Output Current

O

DC VCCor Ground Current

GND

Storage Temperature -65 to +150

stg

Lead Temperature (10 sec) 300

L

Supply Voltage (note 1) 2 to 3.6 V

CC

Input Voltage 0 to V

I

Output Voltage 0 to V

O

Operating Temperature: -40 to +85

op

= 3V) (note 2) 0 to 10 ns/V

CC

50 mA

±

400 mA

±

CC
CC

o

C

o

C

V
V

o

C

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