1/9July 2001
■ HIGH SPEED:
t
PD
=5.8 ns (TYP.) at VCC = 3.3 V
■ COMPA TIBLE WITH TTL OU TPUTS
■ LOW POWER DISSIPATION:
I
CC
= 4 µA (MAX.) at TA=25°C
■ LOW NOISE:
V
OLP
= 0.4V (TYP.) at VCC = 3.3V
■ 75Ω TRANSMISSION LINE DRIVING
CAPABILITY
■ SYMMETRICAL OUTPUT IMPED ANCE:
|I
OH
| = IOL = 12mA (MIN) at VCC = 3.0 V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
■ OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 541
■ IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LVQ541 is a low voltage CMOS OCTAL
BUS BUFFER with 3 STATE OUTPUTS NON
INVERTED fabricated with sub-micron silicon
gate and double-layer metal wiring C
2
MOS
technology. It is ideal for low power and low noise
3.3V applications.
The 3-STATE control gate operates as two input
and such that if either G1
and G2 are high, all
eight outputs are in the high impedance s tate. In
order to enhance PC boa rd layout, the 74AC541
offers a pinout having inputs and outputs on
opposite side of the package.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVQ541
OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (NON INVERTED)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
SOP 74LVQ541M 74LVQ541MTR
TSSOP 74LVQ541TTR
TSSOPSOP