SGS Thomson Microelectronics 74LVQ125 Datasheet
74LVQ125
QUAD BUS BUFFERS (3-STATE)
■ HIGHSPEED:t
■
COMPATIBLEWITHTTLOUTPUTS
■ LOW POWERDISSIPATION:
=4µA (MAX.)at TA=25oC
I
CC
■ LOWNOISE:
V
=0.3V(TYP.)atVCC=3.3V
OLP
■
75ΩTRANSMISSIONLINEDRIVING
=5 ns(TYP.)atVCC=3.3V
PD
CAPABILITY
■
SYMMETRICALOUTPUT IMPEDANCE:
|I
|=IOL=12 mA(MIN)
OH
■ PCIBUSLEVELSGUARANTEED AT24mA
■
BALANCEDPROPAGATIONDELAYS:
≅ t
t
PLH
PHL
■
OPERATINGVOLTAGERANGE:
V
(OPR)= 2V to3.6V(1.2VDataRetention)
CC
■ PINANDFUNCTIONCOMPATIBLEWITH
74SERIES125
■ IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The LVQ125 is a low voltage CMOS QUAD BUS
BUFFERS fabricated with sub-micron silicon gate
and double-layer metal wiring C
2
MOS
M
(Micro Package)
(TSSOPPackage)
T
ORDERCODES :
74LVQ125M 74LVQ125T
technology.It is ideal for low power and low noise
3.3Vapplications.
The device requires the same 3-STATE control
input G to be set high to place the output in to the
high impedancestate.
It has better speed performance at 3.3V than 5V
LS-TTL family combined with the true CMOS low
powerconsumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
February 1999
1/8
74LVQ125
INPUT AND OUTPUT EQUIVALENTCIRCUIT
PIN DESCRIPTION
PI N No SYMB OL NAME AND F UNCT I O N
1, 4, 10, 13 1G to 4G Output Enable Inputs
2, 5, 9, 12 1A to 4A Data Inputs
3, 6, 8, 11 1Y to 4Y Data Outputs
7 GND Ground (0V)
14 V
CC
Positive Supply Voltage
TRUTH TABLE
AGY
XHZ
LLL
HLH
X:”H” or”L”
Z: HighImpedance
ABSOLUTE MAXIMUM RATINGS
Symb o l Para met er Val u e Uni t
V
V
V
I
I
OK
I
or I
I
CC
T
T
AbsoluteMaximumRatingsarethosevaluesbeyondwhichdamagetothedevicemayoccur.Functionaloperationundertheseconditionisnotimplied.
Supply Voltage -0.5 to +7 V
CC
DC Input Voltage -0.5 to VCC+ 0.5 V
I
DC Output Voltage -0.5 to VCC+ 0.5 V
O
DC Input Diode Current
IK
20 mA
±
DC Output Diode Current ± 20 mA
DC Output Current ± 50 mA
O
DC VCCor Ground Current ± 200 mA
GND
Storage Temperature -65 to +150
stg
Lead Temperature (10 sec) 300
L
o
C
o
C
RECOMMENDEDOPERATINGCONDITIONS
Symb o l Para met er Value Un it
V
V
V
T
dt/dv Input Rise and Fall Time (V
1) Truth Table guaranteed: 1.2V to 3.6V
from0.8Vto 2V
2)V
IN
2/8
Supply Voltage (note 1) 2 to 3.6 V
CC
Input Voltage 0 to V
I
Output Voltage 0 to V
O
Operating Temperature: -40 to +85
op
= 3V) (note 2) 0 to 10 ns/V
CC
CC
CC
V
V
o
C
74LVQ125
DC SPECIFICATIONS
Symbol Parameter Test Conditions Value Unit
T
V
CC
(V)
High Level Input Voltage
V
IH
Low Level Input Voltage 0.8 0.8 V
V
IL
High Level Output
V
OH
Voltage
Low Level Output
V
OL
Voltage
Input Leakage Current
I
I
3 State Output Leakage
I
OZ
Current
Quiescent Supply
I
CC
3.0 to
3.6
3.0 V
3.0 V
3.6
3.6
(*)
=
IO=-50 µA 2.9 2.99 2.9
I
or
V
IH
V
IL
(*)
I
V
IH
V
IL
=-12 mA 2.58 2.48
I
O
=-24 mA 2.2
I
O
=
IO=50 µA 0.002 0.1 0.1
or
=12 mA 0 0.36 0.44
I
O
=24 mA 0.55
I
O
VI=VCCor GND ±0.1 ±1 µA
VI=VIHor V
IL
VO=VCCor GND
3.6 VI=VCCor GND 4 40 µA
Current
Dynamic Output Current
I
OLD
OHD
(note 1, 2)
I
1) Maximum test duration 2ms, one output loaded attime
2)Incident waveswitchingisguaranteed ontransmissionlineswithimpedancesaslowas50 Ω.
(*)Alloutputs loaded.
3.6 V
= 0.8 V max 36 mA
OLD
V
= 2 V min -25 mA
OHD
=25oC -40 t o 85oC
A
Min. Typ. Max. Min. Max.
2.0 2.0
±
0.25
2.5
±
µ
V
V
V
A
DYNAMICSWITCHING CHARACTERISTICS
Symbol Parameter Test Conditions Value Unit
T
V
CC
(V)
V
V
V
Dynamic Low Voltage
OLP
Quiet Output (note 1, 2)
OLV
Dynamic High Voltage
IHD
3.3
3.3 2
C
L
=50pF
Input (note 1, 3)
V
Dynamic Low Voltage
ILD
3.3 0.8
Input (note 1, 3)
1)Worstcasepackage
2)Maxnumberofoutputs defined as(n).Datainputs aredriven 0Vto3.3V,(n -1)outputsswitchingandoneoutput atGND
3)maxnumberofdatainputs (n)switching.(n-1)switching 0Vto3.3V. Inputsunder testswitching: 3.3Vto threshold (V
=25oC -40 t o 85oC
A
Min. Typ. Max. Min. Max.
0.3 0.8
-0.8 -0.3
),0Vtothreshold (V
ILD
).f=1MHz
IHD
V
3/8
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