SGS Thomson Microelectronics 74LVQ02 Datasheet



74LVQ02

QUAD 2-INPUT NOR GATE

■ HIGHSPEED:t

■

COMPATIBLEWITHTTL OUTPUTS

■ LOW POWERDISSIPAT ION:

I

=2 µA(MAX.) at TA=25oC

CC

■

LOWNOISE:

=0.3 V (TYP.)atVCC=3.3V

V

OLP

■

75ΩTRANSMISSIONLINEDRIVING

=5 ns(TYP.)atVCC=3.3V

PD

CAPABILITY

■ SYMMETRICALOUTPUTIMPEDANCE:

|=IOL=12mA(MIN)

|I

OH

■ PCIBUSLEVELSGUARANTEEDAT24mA

■

BALANCEDPROPAGATIONDELAYS:
t

≅ t

PLH

PHL

■ OPERATINGVOLTAGERANGE:

(OPR)= 2Vto3.6V(1.2VDataRetention)

V

CC

■ PINANDFUNCTION COMPATIBLEWITH

74SERIES02

■ IMPROVEDLATCH-UPIMMUNITY

DESCRIPTION

The LVQ02 is a low voltage CMOS QUAD
2-INPUT NOR GATE fabricated with sub-micron
silicon gate and double-layermetal wiring C

2

MOS

M

(Micro Package)

(TSSOPPackage)

T

ORDERCODES :

74LVQ02M 74LVQ02T

technology.Itis ideal forlow power and low noise

3.3Vapplications.
The internal circuit is composed of 3 stages

including buffer output, which enables high noise
immunityand stableoutput.

It has better speed performance at 3.3V than 5V
LS-TTL family combined with the true CMOS low
powerconsumption.

All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

February 1999

1/8

74LVQ02

INPUT AND OUTPUTEQUIVALENT CIRCUIT

PIN DESCRIPTION

PI N No SYMB OL NAME AND FUNCTION

2, 5, 8, 11 1A to 4A Data Inputs
3, 6, 9, 12 1B to 4B Data Inputs

1, 4, 10, 13 1Y to 4Y Data Outputs

7 GND Ground (0V)

14 V

CC

Positive Supply Voltage

TRUTH TABLE

ABY

LLH

LHL
HLL
HHL

ABSOLUTE MAXIMUM RATINGS

Symb o l Para met er Val u e Uni t

V

V

V

I

I

OK

I

or I

I

CC

T

T

AbsoluteMaximumRatingsarethose valuesbeyondwhichdamagetothedevicemayoccur. Functional operation underthese condition isnotimplied.

Supply Voltage -0.5 to +7 V

CC

DC Input Voltage -0.5 to VCC+ 0.5 V

I

DC Output Voltage -0.5 to VCC+ 0.5 V

O

DC Input Diode Current ± 20 mA

IK

DC Output Diode Current
DC Output Current ± 50 mA

O

DC VCCor Ground Current ± 200 mA

GND

Storage Temperature -65 to +150

stg

Lead Temperature (10 sec) 300

L

20 mA

±

o

C

o

C

RECOMMENDED OPERATING CONDITIONS

Symb o l Para met er Value Un it

V

V

V

T

dt/dv Input Rise and Fall Time (V

1) TruthTab le guaranteed: 1.2Vto 3.6V

2)V

from0.8Vto2V

IN

2/8

Supply Voltage (note 1) 2 to 3.6 V

CC

Input Voltage 0 to V

I

Output Voltage 0 to V

O

Operating Temperature: -40 to +85

op

= 3V) (note 2) 0 to 10 ns/V

CC

CC
CC

V
V

o

C

74LVQ02

DC SPECIFICATIONS

Symbol Parameter Test Conditions Value Unit

=25oC -40 to 85oC

V

CC

(V)

High Level Input Voltage

V

IH

Low Level Input Voltage 0.8 0.8 V

V

IL

High Level Output

V

OH

Voltage

Low Level Output

V

OL

Voltage

Input Leakage Current

I

I

Quiescent Supply

I

CC

3.0 to

3.6

3.0

3.0 V

3.6

V

V

IO=-50 µA 2.9 2.99 2.9

(*)

=

I

V

IL

(*)

I
IH

V

IL

=-12 mA 2.58 2.48

I

O

=-24 mA 2.2

I

O

=

IO=50 µA 0.002 0.1 0.1

or

=12 mA 0 0.36 0.44

I

O

=24 mA 0.55

I

O

VI=VCCor GND

3.6 VI=VCCor GND 2 20 µA

Current
Dynamic Output Current

I

OLD

OHD

(note 1, 2)

I

1) Maximumtest duration 2ms, oneoutput loaded at time

2)Incident waveswitchingisguaranteedontransmission lines withimpedancesaslowas50Ω.
(*)All output s loaded.

3.6 V

= 0.8 V max 36 mA

OLD

V

= 2 V min -25 mA

OHD

T

A

Min. Typ. Max. Min. Max.

2.0 2.0 V

0.1

±

1

±

µ

V

V

A

DYNAMICSWITCHING CHARACTERISTICS

Symbol Parameter Test Conditions Value Unit

T

V

CC

(V)

V
V

V

Dynamic Low Voltage

OLP

Quiet Output (note 1, 2)

OLV

Dynamic High Voltage

IHD

3.3

3.3 2

C

L

=50pF

Input (note 1, 3)

V

Dynamic Low Voltage

ILD

3.3 0.8

Input (note 1, 3)

1)Worstcasepackage.

2)Max numberofoutputsdefinedas (n).Datainputsaredriven0Vto3.3V,(n-1)outputs switchingandoneoutputatGND.

3)Max numberofdatainputs(n)switching.(n-1)switching0Vto3.3V.Inputsunder testswitching:3.3Vtothreshold (V

=25oC -40 to 85oC

A

Min. Typ. Max. Min. Max.

0.3 0.8

-0.8 -0.3

),0Vtothreshold(V

ILD

).,f=1MHz.

IHD

V

3/8