SGS Thomson Microelectronics 74LVQ00 Datasheet



74LVQ00

QUAD 2-INPUT NAND GATE

■ HIGHSPEED:t

■

COMPATIBLEWITHTTLOUTPUTS

■ LOW POWERDISSIPATION:

I

=2µA (MAX.)at TA=25oC

CC

■ LOWNOISE:

V

=0.3 V (TYP.)at VCC=3.3V

OLP

■

75ΩTRANSMISSIONLINEDRIVING

=5.5ns(TYP.)atVCC=3.3V

PD

CAPABILITY

■ SYMMETRICALOUTPUTIMPEDANCE:

|I

|=IOL=12mA(MIN)

OH

■ PCIBUSLEVELSGUARANTEEDAT 24mA

■

BALANCEDPROPAGAT IONDELAYS:
t

≅ t

PLH

PHL

■ OPERATINGVOLTAGERANGE:

V

(OPR)= 2Vto3.6V(1.2VDataRetention)

CC

■ PINANDFUNCTION COMPATIBLEWITH

74SERIES00

■ IMPROVEDLATCH-UP IMMUNITY

DESCRIPTION

The LVQ00 is a low voltage CMOS QUAD
2-INPUTNAND GATE fabricated with sub-micron
silicon gate and double-layermetal wiring C

2

MOS

M

(Micro Package)

(TSSOPPackage)

T

ORDERCODES :

74LVQ00M 74LVQ00T

technology.Itis ideal for low power and low noise

3.3Vapplications.
The internal circuit is composed of 3 stages

including buffer output, which enables high noise
immunityand stableoutput.

It has better speed performance at 3.3V than 5V
LS-TTL family combined with the true CMOS low
powerconsumption.

All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.

PIN CONNECTION AND IEC LOGICSYMBOLS

February 1999

1/8

74LVQ00

INPUT AND OUTPUTEQUIVALENT CIRCUIT

PIN DESCRIPTION

PI N No SYMB OL NAME AND F U NCTION

1, 4, 9, 12 1A to 4A Data Inputs

2, 5, 10, 13 1B to 4B Data Inputs

3, 6, 8, 11 1Y to 4Y Data Outputs

7 GND Ground (0V)

14 V

CC

Positive Supply Voltage

TRUTH TABLE

ABY

LLH

LHH
HLH
HHL

ABSOLUTE MAXIMUM RATINGS

Symb o l Para met er Val u e Uni t

V

V

V

I

I

OK

I

or I

I

CC

T

T

AbsoluteMaximumRatingsarethosevaluesbeyond whichdamagetothedevice mayoccur. Functionaloperationunderthesecondition isnotimplied.

Supply Voltage -0.5 to +7 V

CC

DC Input Voltage -0.5 to VCC+ 0.5 V

I

DC Output Voltage -0.5 to VCC+ 0.5 V

O

DC Input Diode Current

IK

20 mA

±

DC Output Diode Current ± 20 mA
DC Output Current ± 50 mA

O

DC VCCor Ground Current ± 200 mA

GND

Storage Temperature -65 to +150

stg

Lead Temperature (10 sec) 300

L

o

C

o

C

RECOMMENDED OPERATINGCONDITIONS

Symb o l Para met er Value Un it

V

V

V

T

dt/dv Input Rise and Fall Time (V

1) TruthTable guaranteed: 1.2V to 3.6V

2)V

from0.8V to 2V

IN

2/8

Supply Voltage (note 1) 2 to 3.6 V

CC

Input Voltage 0 to V

I

Output Voltage 0 to V

O

Operating Temperature: -40 to +85

op

= 3V) (note 2) 0 to 10 ns/V

CC

CC
CC

V
V

o

C

74LVQ00

DC SPECIFICATIONS

Symbol Parameter Test Conditions Value Unit

T

V

CC

(V)

High Level Input Voltage

V

IH

Low Level Input Voltage 0.8 0.8 V

V

IL

High Level Output

V

OH

Voltage

Low Level Output

V

OL

Voltage

Input Leakage Current

I

I

Quiescent Supply

I

CC

3.0 to

3.6

3.0 V

3.0 V

3.6

(*)

=

IO=-50 µA 2.9 2.99 2.9

I

or

V

IH

V

IL

(*)

I

V

IH

=-12 mA 2.58 2.48

I

O

=-24 mA 2.2

I

O

=

IO=50 µA 0.002 0.1 0.1

=12 mA 0 0.36 0.44

I

O

=24 mA 0.55

I

O

VI=VCCor GND ±0.1 ±1 µA

3.6 VI=VCCor GND 2 20

Current
Dynamic Output Current

I

OLD

OHD

(note 1, 2)

I

1) Maximumtest duration 2ms, one output loaded attime

2)Incident waveswitchingisguaranteed ontransmission lines withimpedances aslowas50 Ω.
(*)All outputs loaded.

3.6 V

= 0.8 V max 36 mA

OLD

V

= 2 V min -25 mA

OHD

=25oC -40 to 85oC

A

Min. Typ. Max. Min. Max.

2.0 2.0

µ

V

V

V

A

DYNAMICSWITCHING CHARACTERISTICS

Symbol Parameter Test Conditions Value Unit

T

V

CC

(V)

V
V

V

Dynamic Low Voltage

OLP

Quiet Output (note 1, 2)

OLV

Dynamic High Voltage

IHD

3.3

3.3 2

C

L

=50pF

Input (note 1, 3)

V

Dynamic Low Voltage

ILD

3.3 0.8

Input (note 1, 3)

1)Worstcasepackage.

2)Maxnumberofoutputsdefined as(n).Datainputs aredriven0Vto3.3V,(n -1)outputs switchingandoneoutput atGND.

3)Maxnumberofdatainputs (n)switching.(n-1)switching0Vto3.3V.Inputs undertestswitching: 3.3Vtothreshold (V

=25oC -40 to 85oC

A

Min. Typ. Max. Min. Max.

0.3 0.8

-0.8 -0.3

),0Vtothreshold(V

ILD

),f=1MHz.

IHD

V

3/8