1/10June 2002
■ 5V TOLERANT INPUTS AND OUTPUTS
■ HIGH SPEED :
t
PD
= 6.0 ns (MAX.) at VCC = 3V
■ POWER DOWN PROTECTION ON INPUT S
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = IOL = 24mA (MIN) at VCC = 3V
■ PCI BUS LEVELS GUARANT EED AT 2 4 mA
■ BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
■ OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 257
■ LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
■ ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX257 is a low v oltage CMOS QUAD 2
CHANNEL MULTIPLEXER (3-STATE) fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology. It is ideal for low
power and high speed 3.3V applications; it can be
interfaced to 5V signal environment for both inputs
and ou tputs.
It is composed of four independent 2 channel
multiplexers with commo n SELECT and ENABLE
(OE
) INPUT. The 74LCX257 is a non-inverting
multiplexer. When the ENABLE INPUT is held
"High", all outputs become in high impedance
state. If SELECT INPUT is held "L ow", "A" dat a is
selected, when SELECT INPUT is "High", "B"
data is chosen.
It has same speed performance at 3. 3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LCX257
LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER
WITH 5V TOLERANT IN PU TS AN D OU TPUTS (3-STATE)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
SOP 74LCX257M 74LCX257MTR
TSSOP 74LCX257TTR
TSSOPSOP