74LCX138
LOW VOLTAGE CMOS 3 TO 8 LINE DECODER (INV.)
WITH 5V TOLERANT INPUTS
■ 5V TOLERANT INPUTS
■ HIGH SPEED :
t
= 6.7ns (MAX.) at VCC = 3V
PD
■ POWER DOWN PROTECTION ON INPUT S
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 24mA (MIN) at VCC = 3V
OH
■ PCI BUS LEVELS GUARANT EED AT 2 4 mA
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
■ OPERATING VOLTAGE RANGE:
V
CC
PHL
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 138
■ LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
■ ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX138 is a low voltage CMOS 3 TO 8
LINE DECODER (INVERTING) fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low power
and high speed 3.3V applications; it can be
interfaced to 5V signal environment for inputs.
If the device is enabled, 3 binary select inputs (A,
B and C) determine which one of the o utputs will
TSSOPSOP
ORDER CODES
PACKAGE TUBE T & R
SOP 74LCX138M 74LCX138MTR
TSSOP 74LCX138TTR
go low. If enable input G1 is held low or either G2A
or G2B is held high, the decoding function is
ihnibited and all the 8 outputs go to high.
Three enable inputs are provided to ease cascade
connection and application of address decoders
for memory systems.
It has same speed performance at 3. 3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/9September 2001
74LCX138
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
1, 2, 3 A, B, C Address Inputs
4, 5 G2A
6 G1 Enable Input
15, 14, 13, 12, 11, 10, 9, 7 Y0
8 GND Ground (0V)
16 V
, G2B Enable Inputs
to Y7 Outputs
CC
Positive Supply Voltage
TRUTH TABLE
INPUTS
ENABLE SELECT
G2B
X : Don’t Care
G2A G1CBAY0Y1 Y2 Y3 Y4 Y5 Y6 Y7
XXLXXXHHHHHHHH
XHXXXXHHHHHHHH
HXXXXXHHHHHHHH
LLHLLLLHHHHHHH
LLHLLHHLHHHHHH
LLHLHLHHLHHHHH
LLHLHHHHHLHHHH
LLHHL LHHHHLHHH
LLHHLHHHHHHLHH
LLHHHLHHHHHHLH
LLHHHHHHHHHHHL
OUTPUTS
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LOGIC DIAGRAM
This log i c diagram has not be used to esti m ate propaga tion delays
ABSOLUTE MAXIMUM RATINGS
74LCX138
Symbol Parameter Value Unit
V
V
V
V
I
I
OK
I
I
CC
I
GND
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) I
absolute ma xim um rating mu st be observed
O
2) V
< GND
O
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage (VCC = 0V)
O
DC Output Voltage (High or Low State) (note 1) -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current (note 2)
DC Output Current
O
DC Supply Current per Supply Pin
DC Ground Current per Supply Pin
Storage Temperature
stg
Lead Temperature (10 sec)
L
-0.5 to +7.0 V
-0.5 to +7.0 V
-0.5 to +7.0 V
V
- 50 mA
- 50 mA
± 50 mA
± 100 mA
± 100 mA
-65 to +150 °C
300 °C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
V
I
OH
I
OH
T
dt/dv Input Rise and Fall Time (note 2) 0 to 10 ns/V
1) Truth T abl e guaranteed: 1.5V to 3.6V
2) V
from 0.8V to 2V at VCC = 3.0V
IN
Supply Voltage (note 1)
CC
Input Voltage
I
Output Voltage (VCC = 0V)
O
Output Voltage (High or Low State) 0 to V
O
, I
High or Low Level Output Current (VCC = 3.0 to 3.6V)
OL
, I
High or Low Level Output Current (VCC = 2.7V)
OL
Operating Temperature
op
2.0 to 3.6 V
0 to 5.5 V
0 to 5.5 V
CC
± 24 mA
± 12 mA
-55 to 125 °C
V
3/9